drivers/sound/esssolo1.c

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 1 /*****************************************************************************/
 2
 3 /*
 4  * esssolo1.c -- ESS Technology Solo1 (ES1946) audio driver.
 5  *
 6  * Copyright (C) 1998-1999 Thomas Sailer (sailer@ife.ee.ethz.ch)
 7  *
 8  * This program is free software; you can redistribute it and/or modify
 9  * it under the terms of the GNU General Public License as published by
 10  * the Free Software Foundation; either version 2 of the License, or
 11  * (at your option) any later version.
 12  *
 13  * This program is distributed in the hope that it will be useful,
 14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
 15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 16  * GNU General Public License for more details.
 17  *
 18  * You should have received a copy of the GNU General Public License
 19  * along with this program; if not, write to the Free Software
 20  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 21  *
 22  * Module command line parameters:
 23  * none so far
 24  *
 25  * Supported devices:
 26  * /dev/dsp standard /dev/dsp device, (mostly) OSS compatible
 27  * /dev/mixer standard /dev/mixer device, (mostly) OSS compatible
 28  * /dev/midi simple MIDI UART interface, no ioctl
 29  *
 30  * Revision history
 31  * 10.11.98 0.1 Initial release (without any hardware)
 32  * 22.03.99 0.2 cinfo.blocks should be reset after GETxPTR ioctl.
 33  * reported by Johan Maes <joma@telindus.be>
 34  * return EAGAIN instead of EBUSY when O_NONBLOCK
 35  * read/write cannot be executed
 36  * 07.04.99 0.3 implemented the following ioctl's: SOUND_PCM_READ_RATE,
 37  * SOUND_PCM_READ_CHANNELS, SOUND_PCM_READ_BITS;
 38  * Alpha fixes reported by Peter Jones <pjones@redhat.com>
 39  * 15.06.99 0.4 Fix bad allocation bug.
 40  * Thanks to Deti Fliegl <fliegl@in.tum.de>
 41  * 28.06.99 0.5 Add pci_set_master
 42  * 12.08.99 0.6 Fix MIDI UART crashing the driver
 43  * Changed mixer semantics from OSS documented
 44  * behaviour to OSS "code behaviour".
 45  * Recording might actually work now.
 46  * The real DDMA controller address register is at PCI config
 47  * 0x60, while the register at 0x18 is used as a placeholder
 48  * register for BIOS address allocation. This register
 49  * is supposed to be copied into 0x60, according
 50  * to the Solo1 datasheet. When I do that, I can access
 51  * the DDMA registers except the mask bit, which
 52  * is stuck at 1. When I copy the contents of 0x18 +0x10
 53  * to the DDMA base register, everything seems to work.
 54  * The fun part is that the Windows Solo1 driver doesn't
 55  * seem to do these tricks.
 56  * Bugs remaining: plops and clicks when starting/stopping playback
 57  * 31.08.99 0.7 add spin_lock_init
 58  * replaced current->state = x with set_current_state(x)
 59  * 03.09.99 0.8 change read semantics for MIDI to match
 60  * OSS more closely; remove possible wakeup race
 61  *
 62  */
 63
 64 /*****************************************************************************/
 65
 66 #include <linux/version.h>
 67 #include <linux/module.h>
 68 #include <linux/string.h>
 69 #include <linux/ioport.h>
 70 #include <linux/sched.h>
 71 #include <linux/delay.h>
 72 #include <linux/sound.h>
 73 #include <linux/malloc.h>
 74 #include <linux/soundcard.h>
 75 #include <linux/pci.h>
 76 #include <linux/bitops.h>
 77 #include <asm/io.h>
 78 #include <asm/dma.h>
 79 #include <linux/init.h>
 80 #include <linux/poll.h>
 81 #include <linux/spinlock.h>
 82 #include <asm/uaccess.h>
 83 #include <asm/hardirq.h>
 84
 85 #include"dm.h"
 86
 87 /* --------------------------------------------------------------------- */
 88
 89 #undef OSS_DOCUMENTED_MIXER_SEMANTICS
 90
 91 /* --------------------------------------------------------------------- */
 92
 93 #ifndef PCI_VENDOR_ID_ESS
 94 #define PCI_VENDOR_ID_ESS 0x125d
 95 #endif
 96 #ifndef PCI_DEVICE_ID_ESS_SOLO1
 97 #define PCI_DEVICE_ID_ESS_SOLO1 0x1969
 98 #endif
 99
 100 #define SOLO1_MAGIC ((PCI_VENDOR_ID_ESS<<16)|PCI_DEVICE_ID_ESS_SOLO1)
 101
 102 #define DDMABASE_OFFSET 0x10/* chip bug workaround kludge */
 103 #define DDMABASE_EXTENT 16
 104
 105 #define IOBASE_EXTENT 16
 106 #define SBBASE_EXTENT 16
 107 #define VCBASE_EXTENT (DDMABASE_EXTENT+DDMABASE_OFFSET)
 108 #define MPUBASE_EXTENT 4
 109 #define GPBASE_EXTENT 4
 110
 111
 112 /* MIDI buffer sizes */
 113
 114 #define MIDIINBUF 256
 115 #define MIDIOUTBUF 256
 116
 117 #define FMODE_MIDI_SHIFT 3
 118 #define FMODE_MIDI_READ (FMODE_READ << FMODE_MIDI_SHIFT)
 119 #define FMODE_MIDI_WRITE (FMODE_WRITE << FMODE_MIDI_SHIFT)
 120
 121 #define FMODE_DMFM 0x10
 122
 123 /* --------------------------------------------------------------------- */
 124
 125 struct solo1_state {
 126 /* magic */
 127 unsigned int magic;
 128
 129 /* we keep the cards in a linked list */
 130 struct solo1_state *next;
 131
 132 /* pcidev is needed to turn off the DDMA controller at driver shutdown */
 133 struct pci_dev *pcidev;
 134
 135 /* soundcore stuff */
 136 int dev_audio;
 137 int dev_mixer;
 138 int dev_midi;
 139 int dev_dmfm;
 140
 141 /* hardware resources */
 142 unsigned long iobase, sbbase, vcbase, ddmabase, mpubase, gpbase;/* long for SPARC */
 143 unsigned int irq;
 144
 145 /* mixer registers */
 146 struct{
 147 unsigned short vol[10];
 148 unsigned int recsrc;
 149 unsigned int modcnt;
 150 unsigned short micpreamp;
 151 } mix;
 152
 153 /* wave stuff */
 154 unsigned fmt;
 155 unsigned channels;
 156 unsigned rate;
 157 unsigned char clkdiv;
 158 unsigned ena;
 159
 160  spinlock_t lock;
 161 struct semaphore open_sem;
 162  mode_t open_mode;
 163  wait_queue_head_t open_wait;
 164
 165 struct dmabuf {
 166 void*rawbuf;
 167 unsigned buforder;
 168 unsigned numfrag;
 169 unsigned fragshift;
 170 unsigned hwptr, swptr;
 171 unsigned total_bytes;
 172 int count;
 173 unsigned error;/* over/underrun */
 174  wait_queue_head_t wait;
 175 /* redundant, but makes calculations easier */
 176 unsigned fragsize;
 177 unsigned dmasize;
 178 unsigned fragsamples;
 179 /* OSS stuff */
 180 unsigned mapped:1;
 181 unsigned ready:1;
 182 unsigned endcleared:1;
 183 unsigned ossfragshift;
 184 int ossmaxfrags;
 185 unsigned subdivision;
 186 } dma_dac, dma_adc;
 187
 188 /* midi stuff */
 189 struct{
 190 unsigned ird, iwr, icnt;
 191 unsigned ord, owr, ocnt;
 192  wait_queue_head_t iwait;
 193  wait_queue_head_t owait;
 194 struct timer_list timer;
 195 unsigned char ibuf[MIDIINBUF];
 196 unsigned char obuf[MIDIOUTBUF];
 197 } midi;
 198 };
 199
 200 /* --------------------------------------------------------------------- */
 201
 202 struct solo1_state *devs = NULL;
 203
 204 /* --------------------------------------------------------------------- */
 205
 206 extern inlinevoidwrite_seq(struct solo1_state *s,unsigned char data)
 207 {
 208 int i;
 209 unsigned long flags;
 210
 211 /* the __cli stunt is to send the data within the command window */
 212 for(i =0; i <0xffff; i++) {
 213 __save_flags(flags);
 214 __cli();
 215 if(!(inb(s->sbbase+0xc) &0x80)) {
 216 outb(data, s->sbbase+0xc);
 217 __restore_flags(flags);
 218 return;
 219 }
 220 __restore_flags(flags);
 221 }
 222 }
 223
 224 extern inlineintread_seq(struct solo1_state *s,unsigned char*data)
 225 {
 226 int i;
 227
 228 if(!data)
 229 return0;
 230 for(i =0; i <0xffff; i++)
 231 if(inb(s->sbbase+0xe) &0x80) {
 232 *data =inb(s->sbbase+0xa);
 233 return1;
 234 }
 235 return0;
 236 }
 237
 238 static intinlinereset_ctrl(struct solo1_state *s)
 239 {
 240 int i;
 241
 242 outb(3, s->sbbase+6);/* clear sequencer and FIFO */
 243 udelay(10);
 244 outb(0, s->sbbase+6);
 245 for(i =0; i <0xffff; i++)
 246 if(inb(s->sbbase+0xe) &0x80)
 247 if(inb(s->sbbase+0xa) ==0xaa) {
 248 write_seq(s,0xc6);/* enter enhanced mode */
 249 return1;
 250 }
 251 return0;
 252 }
 253
 254 static voidwrite_ctrl(struct solo1_state *s,unsigned char reg,unsigned char data)
 255 {
 256 write_seq(s, reg);
 257 write_seq(s, data);
 258 }
 259
 260 static unsigned charread_ctrl(struct solo1_state *s,unsigned char reg)
 261 {
 262 unsigned char r;
 263
 264 write_seq(s,0xc0);
 265 write_seq(s, reg);
 266 read_seq(s, &r);
 267 return r;
 268 }
 269
 270 static voidwrite_mixer(struct solo1_state *s,unsigned char reg,unsigned char data)
 271 {
 272 outb(reg, s->sbbase+4);
 273 outb(data, s->sbbase+5);
 274 }
 275
 276 static unsigned charread_mixer(struct solo1_state *s,unsigned char reg)
 277 {
 278 outb(reg, s->sbbase+4);
 279 returninb(s->sbbase+5);
 280 }
 281
 282 /* --------------------------------------------------------------------- */
 283
 284 extern inlineunsignedld2(unsigned int x)
 285 {
 286 unsigned r =0;
 287
 288 if(x >=0x10000) {
 289  x >>=16;
 290  r +=16;
 291 }
 292 if(x >=0x100) {
 293  x >>=8;
 294  r +=8;
 295 }
 296 if(x >=0x10) {
 297  x >>=4;
 298  r +=4;
 299 }
 300 if(x >=4) {
 301  x >>=2;
 302  r +=2;
 303 }
 304 if(x >=2)
 305  r++;
 306 return r;
 307 }
 308
 309 /* --------------------------------------------------------------------- */
 310
 311 extern inlinevoidstop_dac(struct solo1_state *s)
 312 {
 313 unsigned long flags;
 314
 315 spin_lock_irqsave(&s->lock, flags);
 316  s->ena &= ~FMODE_WRITE;
 317 write_mixer(s,0x78,0x10);
 318 spin_unlock_irqrestore(&s->lock, flags);
 319 }
 320
 321 static voidstart_dac(struct solo1_state *s)
 322 {
 323 unsigned long flags;
 324
 325 spin_lock_irqsave(&s->lock, flags);
 326 if(!(s->ena & FMODE_WRITE) && (s->dma_dac.mapped || s->dma_dac.count >0) && s->dma_dac.ready) {
 327  s->ena |= FMODE_WRITE;
 328 write_mixer(s,0x78,0x12);
 329 udelay(10);
 330 write_mixer(s,0x78,0x13);
 331 }
 332 spin_unlock_irqrestore(&s->lock, flags);
 333 }
 334
 335 extern inlinevoidstop_adc(struct solo1_state *s)
 336 {
 337 unsigned long flags;
 338
 339 spin_lock_irqsave(&s->lock, flags);
 340  s->ena &= ~FMODE_READ;
 341 write_ctrl(s,0xb8,0xe);
 342 spin_unlock_irqrestore(&s->lock, flags);
 343 }
 344
 345 static voidstart_adc(struct solo1_state *s)
 346 {
 347 unsigned long flags;
 348
 349 spin_lock_irqsave(&s->lock, flags);
 350 if(!(s->ena & FMODE_READ) && (s->dma_adc.mapped || s->dma_adc.count < (signed)(s->dma_adc.dmasize -2*s->dma_adc.fragsize))
 351 && s->dma_adc.ready) {
 352  s->ena |= FMODE_READ;
 353 write_ctrl(s,0xb8,0xf);
 354 #if 0
 355 printk(KERN_DEBUG "solo1: DMAbuffer: 0x%08lx\n", (long)s->dma_adc.rawbuf);
 356 printk(KERN_DEBUG "solo1: DMA: mask: 0x%02x cnt: 0x%04x addr: 0x%08x stat: 0x%02x\n",
 357 inb(s->ddmabase+0xf),inw(s->ddmabase+4),inl(s->ddmabase),inb(s->ddmabase+8));
 358 #endif
 359 outb(0, s->ddmabase+0xd);/* master reset */
 360 outb(1, s->ddmabase+0xf);/* mask */
 361 outb(0x54/*0x14*/, s->ddmabase+0xb);/* DMA_MODE_READ | DMA_MODE_AUTOINIT */
 362 outl(virt_to_bus(s->dma_adc.rawbuf), s->ddmabase);
 363 outw(s->dma_adc.dmasize-1, s->ddmabase+4);
 364 outb(0, s->ddmabase+0xf);
 365 }
 366 spin_unlock_irqrestore(&s->lock, flags);
 367 #if 0
 368 printk(KERN_DEBUG "solo1: start DMA: reg B8: 0x%02x SBstat: 0x%02x\n"
 369  KERN_DEBUG "solo1: DMA: stat: 0x%02x cnt: 0x%04x mask: 0x%02x\n",
 370 read_ctrl(s,0xb8),inb(s->sbbase+0xc),
 371 inb(s->ddmabase+8),inw(s->ddmabase+4),inb(s->ddmabase+0xf));
 372 printk(KERN_DEBUG "solo1: A1: 0x%02x A2: 0x%02x A4: 0x%02x A5: 0x%02x A8: 0x%02x\n"
 373  KERN_DEBUG "solo1: B1: 0x%02x B2: 0x%02x B4: 0x%02x B7: 0x%02x B8: 0x%02x B9: 0x%02x\n",
 374 read_ctrl(s,0xa1),read_ctrl(s,0xa2),read_ctrl(s,0xa4),read_ctrl(s,0xa5),read_ctrl(s,0xa8),
 375 read_ctrl(s,0xb1),read_ctrl(s,0xb2),read_ctrl(s,0xb4),read_ctrl(s,0xb7),read_ctrl(s,0xb8),
 376 read_ctrl(s,0xb9));
 377 #endif
 378 }
 379
 380 /* --------------------------------------------------------------------- */
 381
 382 #define DMABUF_DEFAULTORDER (15-PAGE_SHIFT)
 383 #define DMABUF_MINORDER 1
 384
 385 extern inlinevoiddealloc_dmabuf(struct dmabuf *db)
 386 {
 387 unsigned long map, mapend;
 388
 389 if(db->rawbuf) {
 390 /* undo marking the pages as reserved */
 391  mapend =MAP_NR(db->rawbuf + (PAGE_SIZE << db->buforder) -1);
 392 for(map =MAP_NR(db->rawbuf); map <= mapend; map++)
 393 clear_bit(PG_reserved, &mem_map[map].flags);
 394 free_pages((unsigned long)db->rawbuf, db->buforder);
 395 }
 396  db->rawbuf = NULL;
 397  db->mapped = db->ready =0;
 398 }
 399
 400 static intprog_dmabuf(struct solo1_state *s,struct dmabuf *db,int gfp_mask)
 401 {
 402 int order;
 403 unsigned bytespersec;
 404 unsigned bufs, sample_shift =0;
 405 unsigned long map, mapend;
 406
 407  db->hwptr = db->swptr = db->total_bytes = db->count = db->error = db->endcleared =0;
 408 if(!db->rawbuf) {
 409  db->ready = db->mapped =0;
 410 for(order = DMABUF_DEFAULTORDER; order >= DMABUF_MINORDER; order--)
 411 if((db->rawbuf = (void*)__get_free_pages(gfp_mask, order)))
 412 break;
 413 if(!db->rawbuf)
 414 return-ENOMEM;
 415  db->buforder = order;
 416 /* now mark the pages as reserved; otherwise remap_page_range doesn't do what we want */
 417  mapend =MAP_NR(db->rawbuf + (PAGE_SIZE << db->buforder) -1);
 418 for(map =MAP_NR(db->rawbuf); map <= mapend; map++)
 419 set_bit(PG_reserved, &mem_map[map].flags);
 420 }
 421 if(s->fmt & (AFMT_S16_LE | AFMT_U16_LE))
 422  sample_shift++;
 423 if(s->channels >1)
 424  sample_shift++;
 425  bytespersec = s->rate << sample_shift;
 426  bufs = PAGE_SIZE << db->buforder;
 427 if(db->ossfragshift) {
 428 if((1000<< db->ossfragshift) < bytespersec)
 429  db->fragshift =ld2(bytespersec/1000);
 430 else
 431  db->fragshift = db->ossfragshift;
 432 }else{
 433  db->fragshift =ld2(bytespersec/100/(db->subdivision ? db->subdivision :1));
 434 if(db->fragshift <3)
 435  db->fragshift =3;
 436 }
 437  db->numfrag = bufs >> db->fragshift;
 438 while(db->numfrag <4&& db->fragshift >3) {
 439  db->fragshift--;
 440  db->numfrag = bufs >> db->fragshift;
 441 }
 442  db->fragsize =1<< db->fragshift;
 443 if(db->ossmaxfrags >=4&& db->ossmaxfrags < db->numfrag)
 444  db->numfrag = db->ossmaxfrags;
 445  db->fragsamples = db->fragsize >> sample_shift;
 446  db->dmasize = db->numfrag << db->fragshift;
 447 return0;
 448 }
 449
 450 extern inlineintprog_dmabuf_adc(struct solo1_state *s)
 451 {
 452 unsigned long va;
 453 int c;
 454
 455 stop_adc(s);
 456 if((c =prog_dmabuf(s, &s->dma_adc, GFP_KERNEL | GFP_DMA)))
 457 return c;
 458  va =virt_to_bus(s->dma_adc.rawbuf);
 459 if((va & ~((1<<24)-1)))
 460 panic("solo1: buffer above 16M boundary");
 461 outb(0, s->ddmabase+0xd);/* clear */
 462 outb(1, s->ddmabase+0xf);/* mask */
 463 /*outb(0, s->ddmabase+8);*//* enable (enable is active low!) */
 464 outb(0x54, s->ddmabase+0xb);/* DMA_MODE_READ | DMA_MODE_AUTOINIT */
 465 outl(va, s->ddmabase);
 466 outw(s->dma_adc.dmasize-1, s->ddmabase+4);
 467  c = - s->dma_adc.fragsamples;
 468 write_ctrl(s,0xa4, c);
 469 write_ctrl(s,0xa5, c >>8);
 470 outb(0, s->ddmabase+0xf);
 471  s->dma_adc.ready =1;
 472 return0;
 473 }
 474
 475 extern inlineintprog_dmabuf_dac(struct solo1_state *s)
 476 {
 477 unsigned long va;
 478 int c;
 479
 480 stop_dac(s);
 481 if((c =prog_dmabuf(s, &s->dma_dac, GFP_KERNEL)))
 482 return c;
 483 memset(s->dma_dac.rawbuf, (s->fmt & (AFMT_U8 | AFMT_U16_LE)) ?0:0x80, s->dma_dac.dmasize);/* almost correct for U16 */
 484  va =virt_to_bus(s->dma_dac.rawbuf);
 485 if((va ^ (va + s->dma_dac.dmasize -1)) & ~((1<<20)-1))
 486 panic("solo1: buffer crosses 1M boundary");
 487 outl(va, s->iobase);
 488 /* warning: s->dma_dac.dmasize & 0xffff must not be zero! i.e. this limits us to a 32k buffer */
 489 outw(s->dma_dac.dmasize, s->iobase+4);
 490  c = - s->dma_dac.fragsamples;
 491 write_mixer(s,0x74, c);
 492 write_mixer(s,0x76, c >>8);
 493 outb(0xa, s->iobase+6);
 494  s->dma_dac.ready =1;
 495 return0;
 496 }
 497
 498 extern inlinevoidclear_advance(void*buf,unsigned bsize,unsigned bptr,unsigned len,unsigned char c)
 499 {
 500 if(bptr + len > bsize) {
 501 unsigned x = bsize - bptr;
 502 memset(((char*)buf) + bptr, c, x);
 503  bptr =0;
 504  len -= x;
 505 }
 506 memset(((char*)buf) + bptr, c, len);
 507 }
 508
 509 /* call with spinlock held! */
 510
 511 static voidsolo1_update_ptr(struct solo1_state *s)
 512 {
 513 int diff;
 514 unsigned hwptr;
 515
 516 /* update ADC pointer */
 517 if(s->ena & FMODE_READ) {
 518  hwptr = (s->dma_adc.dmasize -1-inw(s->ddmabase+4)) % s->dma_adc.dmasize;
 519  diff = (s->dma_adc.dmasize + hwptr - s->dma_adc.hwptr) % s->dma_adc.dmasize;
 520  s->dma_adc.hwptr = hwptr;
 521  s->dma_adc.total_bytes += diff;
 522  s->dma_adc.count += diff;
 523 #if 0
 524 printk(KERN_DEBUG "solo1: rd: hwptr %u swptr %u dmasize %u count %u\n",
 525  s->dma_adc.hwptr, s->dma_adc.swptr, s->dma_adc.dmasize, s->dma_adc.count);
 526 #endif
 527 if(s->dma_adc.mapped) {
 528 if(s->dma_adc.count >= (signed)s->dma_adc.fragsize)
 529 wake_up(&s->dma_adc.wait);
 530 }else{
 531 if(s->dma_adc.count > (signed)(s->dma_adc.dmasize - ((3* s->dma_adc.fragsize) >>1))) {
 532  s->ena &= ~FMODE_READ;
 533 write_ctrl(s,0xb8,0xe);
 534  s->dma_adc.error++;
 535 }
 536 if(s->dma_adc.count >0)
 537 wake_up(&s->dma_adc.wait);
 538 }
 539 }
 540 /* update DAC pointer */
 541 if(s->ena & FMODE_WRITE) {
 542  hwptr = (s->dma_dac.dmasize -inw(s->iobase+4)) % s->dma_dac.dmasize;
 543  diff = (s->dma_dac.dmasize + hwptr - s->dma_dac.hwptr) % s->dma_dac.dmasize;
 544  s->dma_dac.hwptr = hwptr;
 545  s->dma_dac.total_bytes += diff;
 546 #if 0
 547 printk(KERN_DEBUG "solo1: wr: hwptr %u swptr %u dmasize %u count %u\n",
 548  s->dma_dac.hwptr, s->dma_dac.swptr, s->dma_dac.dmasize, s->dma_dac.count);
 549 #endif
 550 if(s->dma_dac.mapped) {
 551  s->dma_dac.count += diff;
 552 if(s->dma_dac.count >= (signed)s->dma_dac.fragsize)
 553 wake_up(&s->dma_dac.wait);
 554 }else{
 555  s->dma_dac.count -= diff;
 556 if(s->dma_dac.count <=0) {
 557  s->ena &= ~FMODE_WRITE;
 558 write_mixer(s,0x78,0x12);
 559  s->dma_dac.error++;
 560 }else if(s->dma_dac.count <= (signed)s->dma_dac.fragsize && !s->dma_dac.endcleared) {
 561 clear_advance(s->dma_dac.rawbuf, s->dma_dac.dmasize, s->dma_dac.swptr,
 562  s->dma_dac.fragsize, (s->fmt & (AFMT_U8 | AFMT_U16_LE)) ?0:0x80);
 563  s->dma_dac.endcleared =1;
 564 }
 565 if(s->dma_dac.count < (signed)s->dma_dac.dmasize)
 566 wake_up(&s->dma_dac.wait);
 567 }
 568 }
 569 }
 570
 571 /* --------------------------------------------------------------------- */
 572
 573 static voidprog_codec(struct solo1_state *s)
 574 {
 575 unsigned long flags;
 576 int fdiv, filter;
 577 unsigned char c;
 578
 579 reset_ctrl(s);
 580 write_seq(s,0xd3);
 581 /* program sampling rates */
 582  filter = s->rate *9/20;/* Set filter roll-off to 90% of rate/2 */
 583  fdiv =256-7160000/ (filter *82);
 584 spin_lock_irqsave(&s->lock, flags);
 585 write_ctrl(s,0xa1, s->clkdiv);
 586 write_ctrl(s,0xa2, fdiv);
 587 write_mixer(s,0x70, s->clkdiv);
 588 write_mixer(s,0x72, fdiv);
 589 /* program ADC parameters */
 590 write_ctrl(s,0xb8,0xe);
 591 write_ctrl(s,0xb9,/*0x1*/0);
 592 write_ctrl(s,0xa8, (s->channels >1) ?0x11:0x12);
 593  c =0xd0;
 594 if(s->fmt & (AFMT_S16_LE | AFMT_U16_LE))
 595  c |=0x04;
 596 if(s->fmt & (AFMT_S16_LE | AFMT_S8))
 597  c |=0x20;
 598 if(s->channels >1)
 599  c ^=0x48;
 600 write_ctrl(s,0xb7, (c &0x70) |1);
 601 write_ctrl(s,0xb7, c);
 602 write_ctrl(s,0xb1,0x50);
 603 write_ctrl(s,0xb2,0x50);
 604 /* program DAC parameters */
 605  c =0x40;
 606 if(s->fmt & (AFMT_S16_LE | AFMT_U16_LE))
 607  c |=1;
 608 if(s->fmt & (AFMT_S16_LE | AFMT_S8))
 609  c |=4;
 610 if(s->channels >1)
 611  c |=2;
 612 write_mixer(s,0x7a, c);
 613 write_mixer(s,0x78,0x10);
 614  s->ena =0;
 615 spin_unlock_irqrestore(&s->lock, flags);
 616 }
 617
 618 /* --------------------------------------------------------------------- */
 619
 620 static const char invalid_magic[] = KERN_CRIT "solo1: invalid magic value\n";
 621
 622 #define VALIDATE_STATE(s) \
 623 ({ \
 624  if (!(s) || (s)->magic != SOLO1_MAGIC) { \
 625  printk(invalid_magic); \
 626  return -ENXIO; \
 627  } \
 628 })
 629
 630 /* --------------------------------------------------------------------- */
 631
 632 static intmixer_ioctl(struct solo1_state *s,unsigned int cmd,unsigned long arg)
 633 {
 634 static const unsigned int mixer_src[8] = {
 635  SOUND_MASK_MIC, SOUND_MASK_MIC, SOUND_MASK_CD, SOUND_MASK_VOLUME,
 636  SOUND_MASK_MIC,0, SOUND_MASK_LINE,0
 637 };
 638 static const unsigned char mixtable1[SOUND_MIXER_NRDEVICES] = {
 639 [SOUND_MIXER_PCM] =1,/* voice */
 640 [SOUND_MIXER_SYNTH] =2,/* FM */
 641 [SOUND_MIXER_CD] =3,/* CD */
 642 [SOUND_MIXER_LINE] =4,/* Line */
 643 [SOUND_MIXER_LINE1] =5,/* AUX */
 644 [SOUND_MIXER_MIC] =6,/* Mic */
 645 [SOUND_MIXER_LINE2] =7,/* Mono in */
 646 [SOUND_MIXER_SPEAKER] =8,/* Speaker */
 647 [SOUND_MIXER_RECLEV] =9,/* Recording level */
 648 [SOUND_MIXER_VOLUME] =10/* Master Volume */
 649 };
 650 static const unsigned char mixreg[] = {
 651 0x7c,/* voice */
 652 0x36,/* FM */
 653 0x38,/* CD */
 654 0x3e,/* Line */
 655 0x3a,/* AUX */
 656 0x1a,/* Mic */
 657 0x6d/* Mono in */
 658 };
 659 unsigned char l, r, rl, rr, vidx;
 660 int i, val;
 661
 662 VALIDATE_STATE(s);
 663
 664 if(cmd == SOUND_MIXER_PRIVATE1) {
 665 /* enable/disable/query mixer preamp */
 666 get_user_ret(val, (int*)arg, -EFAULT);
 667 if(val != -1) {
 668  val = val ?0xff:0xf7;
 669 write_mixer(s,0x7d, (read_mixer(s,0x7d) |0x08) & val);
 670 }
 671  val = (read_mixer(s,0x7d) &0x08) ?1:0;
 672 returnput_user(val, (int*)arg);
 673 }
 674 if(cmd == SOUND_MIXER_PRIVATE2) {
 675 /* enable/disable/query spatializer */
 676 get_user_ret(val, (int*)arg, -EFAULT);
 677 if(val != -1) {
 678  val &=0x3f;
 679 write_mixer(s,0x52, val);
 680 write_mixer(s,0x50, val ?0x08:0);
 681 }
 682 returnput_user(read_mixer(s,0x52), (int*)arg);
 683 }
 684 if(cmd == SOUND_MIXER_INFO) {
 685  mixer_info info;
 686 strncpy(info.id,"Solo1",sizeof(info.id));
 687 strncpy(info.name,"ESS Solo1",sizeof(info.name));
 688  info.modify_counter = s->mix.modcnt;
 689 if(copy_to_user((void*)arg, &info,sizeof(info)))
 690 return-EFAULT;
 691 return0;
 692 }
 693 if(cmd == SOUND_OLD_MIXER_INFO) {
 694  _old_mixer_info info;
 695 strncpy(info.id,"Solo1",sizeof(info.id));
 696 strncpy(info.name,"ESS Solo1",sizeof(info.name));
 697 if(copy_to_user((void*)arg, &info,sizeof(info)))
 698 return-EFAULT;
 699 return0;
 700 }
 701 if(cmd == OSS_GETVERSION)
 702 returnput_user(SOUND_VERSION, (int*)arg);
 703 if(_IOC_TYPE(cmd) !='M'||_IOC_SIZE(cmd) !=sizeof(int))
 704 return-EINVAL;
 705 if(_IOC_DIR(cmd) == _IOC_READ) {
 706 switch(_IOC_NR(cmd)) {
 707 case SOUND_MIXER_RECSRC:/* Arg contains a bit for each recording source */
 708 returnput_user(mixer_src[read_mixer(s,0x1c) &7], (int*)arg);
 709
 710 case SOUND_MIXER_DEVMASK:/* Arg contains a bit for each supported device */
 711 returnput_user(SOUND_MASK_PCM | SOUND_MASK_SYNTH | SOUND_MASK_CD |
 712  SOUND_MASK_LINE | SOUND_MASK_LINE1 | SOUND_MASK_MIC |
 713  SOUND_MASK_VOLUME | SOUND_MASK_LINE2 | SOUND_MASK_RECLEV |
 714  SOUND_MASK_SPEAKER, (int*)arg);
 715
 716 case SOUND_MIXER_RECMASK:/* Arg contains a bit for each supported recording source */
 717 returnput_user(SOUND_MASK_LINE | SOUND_MASK_MIC | SOUND_MASK_CD | SOUND_MASK_VOLUME, (int*)arg);
 718
 719 case SOUND_MIXER_STEREODEVS:/* Mixer channels supporting stereo */
 720 returnput_user(SOUND_MASK_PCM | SOUND_MASK_SYNTH | SOUND_MASK_CD |
 721  SOUND_MASK_LINE | SOUND_MASK_LINE1 | SOUND_MASK_MIC |
 722  SOUND_MASK_VOLUME | SOUND_MASK_LINE2 | SOUND_MASK_RECLEV, (int*)arg);
 723
 724 case SOUND_MIXER_CAPS:
 725 returnput_user(SOUND_CAP_EXCL_INPUT, (int*)arg);
 726
 727 default:
 728  i =_IOC_NR(cmd);
 729 if(i >= SOUND_MIXER_NRDEVICES || !(vidx = mixtable1[i]))
 730 return-EINVAL;
 731 returnput_user(s->mix.vol[vidx-1], (int*)arg);
 732 }
 733 }
 734 if(_IOC_DIR(cmd) != (_IOC_READ|_IOC_WRITE))
 735 return-EINVAL;
 736  s->mix.modcnt++;
 737 switch(_IOC_NR(cmd)) {
 738 case SOUND_MIXER_RECSRC:/* Arg contains a bit for each recording source */
 739 #if 0
 740 {
 741 static const unsigned char regs[] = {
 742 0x1c,0x1a,0x36,0x38,0x3a,0x3c,0x3e,0x60,0x62,0x6d,0x7c
 743 };
 744 int i;
 745
 746 for(i =0; i <sizeof(regs); i++)
 747 printk(KERN_DEBUG "solo1: mixer reg 0x%02x: 0x%02x\n",
 748  regs[i],read_mixer(s, regs[i]));
 749 printk(KERN_DEBUG "solo1: ctrl reg 0x%02x: 0x%02x\n",
 750 0xb4,read_ctrl(s,0xb4));
 751 }
 752 #endif
 753 get_user_ret(val, (int*)arg, -EFAULT);
 754  i =hweight32(val);
 755 if(i ==0)
 756 return0;
 757 else if(i >1)
 758  val &= ~mixer_src[read_mixer(s,0x1c) &7];
 759 for(i =0; i <8; i++) {
 760 if(mixer_src[i] & val)
 761 break;
 762 }
 763 if(i >7)
 764 return0;
 765 write_mixer(s,0x1c, i);
 766 return0;
 767
 768 case SOUND_MIXER_VOLUME:
 769 get_user_ret(val, (int*)arg, -EFAULT);
 770  l = val &0xff;
 771 if(l >100)
 772  l =100;
 773  r = (val >>8) &0xff;
 774 if(r >100)
 775  r =100;
 776 if(l <6) {
 777  rl =0x40;
 778  l =0;
 779 }else{
 780  rl = (l *2-11) /3;
 781  l = (rl *3+11) /2;
 782 }
 783 if(r <6) {
 784  rr =0x40;
 785  r =0;
 786 }else{
 787  rr = (r *2-11) /3;
 788  r = (rr *3+11) /2;
 789 }
 790 write_mixer(s,0x60, rl);
 791 write_mixer(s,0x62, rr);
 792 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
 793  s->mix.vol[9] = ((unsigned int)r <<8) | l;
 794 #else
 795  s->mix.vol[9] = val;
 796 #endif
 797 returnput_user(s->mix.vol[9], (int*)arg);
 798
 799 case SOUND_MIXER_SPEAKER:
 800 get_user_ret(val, (int*)arg, -EFAULT);
 801  l = val &0xff;
 802 if(l >100)
 803  l =100;
 804 else if(l <2)
 805  l =2;
 806  rl = (l -2) /14;
 807  l = rl *14+2;
 808 write_mixer(s,0x3c, rl);
 809 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
 810  s->mix.vol[7] = l *0x101;
 811 #else
 812  s->mix.vol[7] = val;
 813 #endif
 814 returnput_user(s->mix.vol[7], (int*)arg);
 815
 816 case SOUND_MIXER_RECLEV:
 817 get_user_ret(val, (int*)arg, -EFAULT);
 818  l = (val <<1) &0x1fe;
 819 if(l >200)
 820  l =200;
 821 else if(l <5)
 822  l =5;
 823  r = (val >>7) &0x1fe;
 824 if(r >200)
 825  r =200;
 826 else if(r <5)
 827  r =5;
 828  rl = (l -5) /13;
 829  rr = (r -5) /13;
 830  r = (rl *13+5) /2;
 831  l = (rr *13+5) /2;
 832 write_ctrl(s,0xb4, (rl <<4) | rr);
 833 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
 834  s->mix.vol[8] = ((unsigned int)r <<8) | l;
 835 #else
 836  s->mix.vol[8] = val;
 837 #endif
 838 returnput_user(s->mix.vol[8], (int*)arg);
 839
 840 default:
 841  i =_IOC_NR(cmd);
 842 if(i >= SOUND_MIXER_NRDEVICES || !(vidx = mixtable1[i]))
 843 return-EINVAL;
 844 get_user_ret(val, (int*)arg, -EFAULT);
 845  l = (val <<1) &0x1fe;
 846 if(l >200)
 847  l =200;
 848 else if(l <5)
 849  l =5;
 850  r = (val >>7) &0x1fe;
 851 if(r >200)
 852  r =200;
 853 else if(r <5)
 854  r =5;
 855  rl = (l -5) /13;
 856  rr = (r -5) /13;
 857  r = (rl *13+5) /2;
 858  l = (rr *13+5) /2;
 859 write_mixer(s, mixreg[vidx-1], (rl <<4) | rr);
 860 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
 861  s->mix.vol[vidx-1] = ((unsigned int)r <<8) | l;
 862 #else
 863  s->mix.vol[vidx-1] = val;
 864 #endif
 865 returnput_user(s->mix.vol[vidx-1], (int*)arg);
 866 }
 867 }
 868
 869 /* --------------------------------------------------------------------- */
 870
 871 static loff_t solo1_llseek(struct file *file, loff_t offset,int origin)
 872 {
 873 return-ESPIPE;
 874 }
 875
 876 /* --------------------------------------------------------------------- */
 877
 878 static intsolo1_open_mixdev(struct inode *inode,struct file *file)
 879 {
 880 int minor =MINOR(inode->i_rdev);
 881 struct solo1_state *s = devs;
 882
 883 while(s && s->dev_mixer != minor)
 884  s = s->next;
 885 if(!s)
 886 return-ENODEV;
 887 VALIDATE_STATE(s);
 888  file->private_data = s;
 889  MOD_INC_USE_COUNT;
 890 return0;
 891 }
 892
 893 static intsolo1_release_mixdev(struct inode *inode,struct file *file)
 894 {
 895 struct solo1_state *s = (struct solo1_state *)file->private_data;
 896
 897 VALIDATE_STATE(s);
 898  MOD_DEC_USE_COUNT;
 899 return0;
 900 }
 901
 902 static intsolo1_ioctl_mixdev(struct inode *inode,struct file *file,unsigned int cmd,unsigned long arg)
 903 {
 904 returnmixer_ioctl((struct solo1_state *)file->private_data, cmd, arg);
 905 }
 906
 907 static/*const*/struct file_operations solo1_mixer_fops = {
 908 &solo1_llseek,
 909  NULL,/* read */
 910  NULL,/* write */
 911  NULL,/* readdir */
 912  NULL,/* poll */
 913 &solo1_ioctl_mixdev,
 914  NULL,/* mmap */
 915 &solo1_open_mixdev,
 916  NULL,/* flush */
 917 &solo1_release_mixdev,
 918  NULL,/* fsync */
 919  NULL,/* fasync */
 920  NULL,/* check_media_change */
 921  NULL,/* revalidate */
 922  NULL,/* lock */
 923 };
 924
 925 /* --------------------------------------------------------------------- */
 926
 927 static intdrain_dac(struct solo1_state *s,int nonblock)
 928 {
 929 DECLARE_WAITQUEUE(wait, current);
 930 unsigned long flags;
 931 int count;
 932 unsigned tmo;
 933
 934 if(s->dma_dac.mapped)
 935 return0;
 936 __set_current_state(TASK_INTERRUPTIBLE);
 937 add_wait_queue(&s->dma_dac.wait, &wait);
 938 for(;;) {
 939 spin_lock_irqsave(&s->lock, flags);
 940  count = s->dma_dac.count;
 941 spin_unlock_irqrestore(&s->lock, flags);
 942 if(count <=0)
 943 break;
 944 if(signal_pending(current))
 945 break;
 946 if(nonblock) {
 947 remove_wait_queue(&s->dma_dac.wait, &wait);
 948 set_current_state(TASK_RUNNING);
 949 return-EBUSY;
 950 }
 951  tmo =3* HZ * (count + s->dma_dac.fragsize) /2/ s->rate;
 952 if(s->fmt & (AFMT_S16_LE | AFMT_U16_LE))
 953  tmo >>=1;
 954 if(s->channels >1)
 955  tmo >>=1;
 956 if(!schedule_timeout(tmo +1))
 957 printk(KERN_DEBUG "solo1: dma timed out??\n");
 958 }
 959 remove_wait_queue(&s->dma_dac.wait, &wait);
 960 set_current_state(TASK_RUNNING);
 961 if(signal_pending(current))
 962 return-ERESTARTSYS;
 963 return0;
 964 }
 965
 966 /* --------------------------------------------------------------------- */
 967
 968 static ssize_t solo1_read(struct file *file,char*buffer,size_t count, loff_t *ppos)
 969 {
 970 struct solo1_state *s = (struct solo1_state *)file->private_data;
 971  ssize_t ret;
 972 unsigned long flags;
 973 unsigned swptr;
 974 int cnt;
 975
 976 VALIDATE_STATE(s);
 977 if(ppos != &file->f_pos)
 978 return-ESPIPE;
 979 if(s->dma_adc.mapped)
 980 return-ENXIO;
 981 if(!s->dma_adc.ready && (ret =prog_dmabuf_adc(s)))
 982 return ret;
 983 if(!access_ok(VERIFY_WRITE, buffer, count))
 984 return-EFAULT;
 985  ret =0;
 986 while(count >0) {
 987 spin_lock_irqsave(&s->lock, flags);
 988  swptr = s->dma_adc.swptr;
 989  cnt = s->dma_adc.dmasize-swptr;
 990 if(s->dma_adc.count < cnt)
 991  cnt = s->dma_adc.count;
 992 spin_unlock_irqrestore(&s->lock, flags);
 993 if(cnt > count)
 994  cnt = count;
 995 #ifdef DEBUGREC
 996 printk(KERN_DEBUG "solo1_read: reg B8: 0x%02x DMAstat: 0x%02x DMAcnt: 0x%04x SBstat: 0x%02x cnt: %u\n",
 997 read_ctrl(s,0xb8),inb(s->ddmabase+8),inw(s->ddmabase+4),inb(s->sbbase+0xc), cnt);
 998 #endif
 999 if(cnt <=0) {
1000 start_adc(s);
1001 #ifdef DEBUGREC
1002 printk(KERN_DEBUG "solo1_read: regs: A1: 0x%02x A2: 0x%02x A4: 0x%02x A5: 0x%02x A8: 0x%02x\n"
1003  KERN_DEBUG "solo1_read: regs: B1: 0x%02x B2: 0x%02x B7: 0x%02x B8: 0x%02x B9: 0x%02x\n"
1004  KERN_DEBUG "solo1_read: DMA: addr: 0x%08x cnt: 0x%04x stat: 0x%02x mask: 0x%02x\n"
1005  KERN_DEBUG "solo1_read: SBstat: 0x%02x cnt: %u\n",
1006 read_ctrl(s,0xa1),read_ctrl(s,0xa2),read_ctrl(s,0xa4),read_ctrl(s,0xa5),read_ctrl(s,0xa8),
1007 read_ctrl(s,0xb1),read_ctrl(s,0xb2),read_ctrl(s,0xb7),read_ctrl(s,0xb8),read_ctrl(s,0xb9),
1008 inl(s->ddmabase),inw(s->ddmabase+4),inb(s->ddmabase+8),inb(s->ddmabase+15),inb(s->sbbase+0xc), cnt);
1009 #endif
1010 if(inb(s->ddmabase+15) &1)
1011 printk(KERN_ERR "solo1: cannot start recording, DDMA mask bit stuck at 1\n");
1012 if(file->f_flags & O_NONBLOCK)
1013 return ret ? ret : -EAGAIN;
1014 interruptible_sleep_on(&s->dma_adc.wait);
1015 #ifdef DEBUGREC
1016 printk(KERN_DEBUG "solo1_read: regs: A1: 0x%02x A2: 0x%02x A4: 0x%02x A5: 0x%02x A8: 0x%02x\n"
1017  KERN_DEBUG "solo1_read: regs: B1: 0x%02x B2: 0x%02x B7: 0x%02x B8: 0x%02x B9: 0x%02x\n"
1018  KERN_DEBUG "solo1_read: DMA: addr: 0x%08x cnt: 0x%04x stat: 0x%02x mask: 0x%02x\n"
1019  KERN_DEBUG "solo1_read: SBstat: 0x%02x cnt: %u\n",
1020 read_ctrl(s,0xa1),read_ctrl(s,0xa2),read_ctrl(s,0xa4),read_ctrl(s,0xa5),read_ctrl(s,0xa8),
1021 read_ctrl(s,0xb1),read_ctrl(s,0xb2),read_ctrl(s,0xb7),read_ctrl(s,0xb8),read_ctrl(s,0xb9),
1022 inl(s->ddmabase),inw(s->ddmabase+4),inb(s->ddmabase+8),inb(s->ddmabase+15),inb(s->sbbase+0xc), cnt);
1023 #endif
1024 if(signal_pending(current))
1025 return ret ? ret : -ERESTARTSYS;
1026 continue;
1027 }
1028 if(copy_to_user(buffer, s->dma_adc.rawbuf + swptr, cnt))
1029 return ret ? ret : -EFAULT;
1030  swptr = (swptr + cnt) % s->dma_adc.dmasize;
1031 spin_lock_irqsave(&s->lock, flags);
1032  s->dma_adc.swptr = swptr;
1033  s->dma_adc.count -= cnt;
1034 spin_unlock_irqrestore(&s->lock, flags);
1035  count -= cnt;
1036  buffer += cnt;
1037  ret += cnt;
1038 start_adc(s);
1039 #ifdef DEBUGREC
1040 printk(KERN_DEBUG "solo1_read: reg B8: 0x%02x DMAstat: 0x%02x DMAcnt: 0x%04x SBstat: 0x%02x\n",
1041 read_ctrl(s,0xb8),inb(s->ddmabase+8),inw(s->ddmabase+4),inb(s->sbbase+0xc));
1042 #endif
1043 }
1044 return ret;
1045 }
1046
1047 static ssize_t solo1_write(struct file *file,const char*buffer,size_t count, loff_t *ppos)
1048 {
1049 struct solo1_state *s = (struct solo1_state *)file->private_data;
1050  ssize_t ret;
1051 unsigned long flags;
1052 unsigned swptr;
1053 int cnt;
1054
1055 VALIDATE_STATE(s);
1056 if(ppos != &file->f_pos)
1057 return-ESPIPE;
1058 if(s->dma_dac.mapped)
1059 return-ENXIO;
1060 if(!s->dma_dac.ready && (ret =prog_dmabuf_dac(s)))
1061 return ret;
1062 if(!access_ok(VERIFY_READ, buffer, count))
1063 return-EFAULT;
1064 #if 0
1065 printk(KERN_DEBUG "solo1_write: reg 70: 0x%02x 71: 0x%02x 72: 0x%02x 74: 0x%02x 76: 0x%02x 78: 0x%02x 7A: 0x%02x\n"
1066  KERN_DEBUG "solo1_write: DMA: addr: 0x%08x cnt: 0x%04x stat: 0x%02x SBstat: 0x%02x\n",
1067 read_mixer(s,0x70),read_mixer(s,0x71),read_mixer(s,0x72),read_mixer(s,0x74),read_mixer(s,0x76),
1068 read_mixer(s,0x78),read_mixer(s,0x7a),inl(s->iobase),inw(s->iobase+4),inb(s->iobase+6),inb(s->sbbase+0xc));
1069 printk(KERN_DEBUG "solo1_write: reg 78: 0x%02x reg 7A: 0x%02x DMAcnt: 0x%04x DMAstat: 0x%02x SBstat: 0x%02x\n",
1070 read_mixer(s,0x78),read_mixer(s,0x7a),inw(s->iobase+4),inb(s->iobase+6),inb(s->sbbase+0xc));
1071 #endif
1072  ret =0;
1073 while(count >0) {
1074 spin_lock_irqsave(&s->lock, flags);
1075 if(s->dma_dac.count <0) {
1076  s->dma_dac.count =0;
1077  s->dma_dac.swptr = s->dma_dac.hwptr;
1078 }
1079  swptr = s->dma_dac.swptr;
1080  cnt = s->dma_dac.dmasize-swptr;
1081 if(s->dma_dac.count + cnt > s->dma_dac.dmasize)
1082  cnt = s->dma_dac.dmasize - s->dma_dac.count;
1083 spin_unlock_irqrestore(&s->lock, flags);
1084 if(cnt > count)
1085  cnt = count;
1086 if(cnt <=0) {
1087 start_dac(s);
1088 if(file->f_flags & O_NONBLOCK)
1089 return ret ? ret : -EAGAIN;
1090 interruptible_sleep_on(&s->dma_dac.wait);
1091 if(signal_pending(current))
1092 return ret ? ret : -ERESTARTSYS;
1093 continue;
1094 }
1095 if(copy_from_user(s->dma_dac.rawbuf + swptr, buffer, cnt))
1096 return ret ? ret : -EFAULT;
1097  swptr = (swptr + cnt) % s->dma_dac.dmasize;
1098 spin_lock_irqsave(&s->lock, flags);
1099  s->dma_dac.swptr = swptr;
1100  s->dma_dac.count += cnt;
1101  s->dma_dac.endcleared =0;
1102 spin_unlock_irqrestore(&s->lock, flags);
1103  count -= cnt;
1104  buffer += cnt;
1105  ret += cnt;
1106 start_dac(s);
1107 }
1108 return ret;
1109 }
1110
1111 static unsigned intsolo1_poll(struct file *file,struct poll_table_struct *wait)
1112 {
1113 struct solo1_state *s = (struct solo1_state *)file->private_data;
1114 unsigned long flags;
1115 unsigned int mask =0;
1116
1117 VALIDATE_STATE(s);
1118 if(file->f_mode & FMODE_WRITE)
1119 poll_wait(file, &s->dma_dac.wait, wait);
1120 if(file->f_mode & FMODE_READ)
1121 poll_wait(file, &s->dma_adc.wait, wait);
1122 spin_lock_irqsave(&s->lock, flags);
1123 solo1_update_ptr(s);
1124 if(file->f_mode & FMODE_READ) {
1125 if(s->dma_adc.mapped) {
1126 if(s->dma_adc.count >= (signed)s->dma_adc.fragsize)
1127  mask |= POLLIN | POLLRDNORM;
1128 }else{
1129 if(s->dma_adc.count >0)
1130  mask |= POLLIN | POLLRDNORM;
1131 }
1132 }
1133 if(file->f_mode & FMODE_WRITE) {
1134 if(s->dma_dac.mapped) {
1135 if(s->dma_dac.count >= (signed)s->dma_dac.fragsize)
1136  mask |= POLLOUT | POLLWRNORM;
1137 }else{
1138 if((signed)s->dma_dac.dmasize > s->dma_dac.count)
1139  mask |= POLLOUT | POLLWRNORM;
1140 }
1141 }
1142 spin_unlock_irqrestore(&s->lock, flags);
1143 return mask;
1144 }
1145
1146
1147 static intsolo1_mmap(struct file *file,struct vm_area_struct *vma)
1148 {
1149 struct solo1_state *s = (struct solo1_state *)file->private_data;
1150 struct dmabuf *db;
1151 int ret;
1152 unsigned long size;
1153
1154 VALIDATE_STATE(s);
1155 if(vma->vm_flags & VM_WRITE) {
1156 if((ret =prog_dmabuf_dac(s)) !=0)
1157 return ret;
1158  db = &s->dma_dac;
1159 }else if(vma->vm_flags & VM_READ) {
1160 if((ret =prog_dmabuf_adc(s)) !=0)
1161 return ret;
1162  db = &s->dma_adc;
1163 }else
1164 return-EINVAL;
1165 if(vma->vm_offset !=0)
1166 return-EINVAL;
1167  size = vma->vm_end - vma->vm_start;
1168 if(size > (PAGE_SIZE << db->buforder))
1169 return-EINVAL;
1170 if(remap_page_range(vma->vm_start,virt_to_phys(db->rawbuf), size, vma->vm_page_prot))
1171 return-EAGAIN;
1172  db->mapped =1;
1173 return0;
1174 }
1175
1176 static intsolo1_ioctl(struct inode *inode,struct file *file,unsigned int cmd,unsigned long arg)
1177 {
1178 struct solo1_state *s = (struct solo1_state *)file->private_data;
1179 unsigned long flags;
1180  audio_buf_info abinfo;
1181  count_info cinfo;
1182 int val, mapped, ret;
1183 int div1, div2;
1184 unsigned rate1, rate2;
1185
1186 VALIDATE_STATE(s);
1187  mapped = ((file->f_mode & FMODE_WRITE) && s->dma_dac.mapped) ||
1188 ((file->f_mode & FMODE_READ) && s->dma_adc.mapped);
1189 switch(cmd) {
1190 case OSS_GETVERSION:
1191 returnput_user(SOUND_VERSION, (int*)arg);
1192
1193 case SNDCTL_DSP_SYNC:
1194 if(file->f_mode & FMODE_WRITE)
1195 returndrain_dac(s,0/*file->f_flags & O_NONBLOCK*/);
1196 return0;
1197
1198 case SNDCTL_DSP_SETDUPLEX:
1199 return0;
1200
1201 case SNDCTL_DSP_GETCAPS:
1202 returnput_user(DSP_CAP_DUPLEX | DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP, (int*)arg);
1203
1204 case SNDCTL_DSP_RESET:
1205 if(file->f_mode & FMODE_WRITE) {
1206 stop_dac(s);
1207 synchronize_irq();
1208  s->dma_dac.swptr = s->dma_dac.hwptr = s->dma_dac.count = s->dma_dac.total_bytes =0;
1209 }
1210 if(file->f_mode & FMODE_READ) {
1211 stop_adc(s);
1212 synchronize_irq();
1213  s->dma_adc.swptr = s->dma_adc.hwptr = s->dma_adc.count = s->dma_adc.total_bytes =0;
1214 }
1215 prog_codec(s);
1216 return0;
1217
1218 case SNDCTL_DSP_SPEED:
1219 get_user_ret(val, (int*)arg, -EFAULT);
1220 if(val >=0) {
1221 stop_adc(s);
1222 stop_dac(s);
1223  s->dma_adc.ready = s->dma_dac.ready =0;
1224 /* program sampling rates */
1225 if(val >48000)
1226  val =48000;
1227 if(val <6300)
1228  val =6300;
1229  div1 = (768000+ val /2) / val;
1230  rate1 = (768000+ div1 /2) / div1;
1231  div1 = -div1;
1232  div2 = (793800+ val /2) / val;
1233  rate2 = (793800+ div2 /2) / div2;
1234  div2 = (-div2) &0x7f;
1235 if(abs(val - rate2) <abs(val - rate1)) {
1236  rate1 = rate2;
1237  div1 = div2;
1238 }
1239  s->rate = rate1;
1240  s->clkdiv = div1;
1241 prog_codec(s);
1242 }
1243 returnput_user(s->rate, (int*)arg);
1244
1245 case SNDCTL_DSP_STEREO:
1246 get_user_ret(val, (int*)arg, -EFAULT);
1247 stop_adc(s);
1248 stop_dac(s);
1249  s->dma_adc.ready = s->dma_dac.ready =0;
1250 /* program channels */
1251  s->channels = val ?2:1;
1252 prog_codec(s);
1253 return0;
1254
1255 case SNDCTL_DSP_CHANNELS:
1256 get_user_ret(val, (int*)arg, -EFAULT);
1257 if(val !=0) {
1258 stop_adc(s);
1259 stop_dac(s);
1260  s->dma_adc.ready = s->dma_dac.ready =0;
1261 /* program channels */
1262  s->channels = val ?2:1;
1263 prog_codec(s);
1264 }
1265 returnput_user(s->channels, (int*)arg);
1266
1267 case SNDCTL_DSP_GETFMTS:/* Returns a mask */
1268 returnput_user(AFMT_S16_LE|AFMT_U16_LE|AFMT_S8|AFMT_U8, (int*)arg);
1269
1270 case SNDCTL_DSP_SETFMT:/* Selects ONE fmt*/
1271 get_user_ret(val, (int*)arg, -EFAULT);
1272 if(val != AFMT_QUERY) {
1273 stop_adc(s);
1274 stop_dac(s);
1275  s->dma_adc.ready = s->dma_dac.ready =0;
1276 /* program format */
1277 if(val != AFMT_S16_LE && val != AFMT_U16_LE &&
1278  val != AFMT_S8 && val != AFMT_U8)
1279  val = AFMT_U8;
1280  s->fmt = val;
1281 prog_codec(s);
1282 }
1283 returnput_user(s->fmt, (int*)arg);
1284
1285 case SNDCTL_DSP_POST:
1286 return0;
1287
1288 case SNDCTL_DSP_GETTRIGGER:
1289  val =0;
1290 if(file->f_mode & s->ena & FMODE_READ)
1291  val |= PCM_ENABLE_INPUT;
1292 if(file->f_mode & s->ena & FMODE_WRITE)
1293  val |= PCM_ENABLE_OUTPUT;
1294 returnput_user(val, (int*)arg);
1295
1296 case SNDCTL_DSP_SETTRIGGER:
1297 get_user_ret(val, (int*)arg, -EFAULT);
1298 if(file->f_mode & FMODE_READ) {
1299 if(val & PCM_ENABLE_INPUT) {
1300 if(!s->dma_adc.ready && (ret =prog_dmabuf_adc(s)))
1301 return ret;
1302 start_adc(s);
1303 if(inb(s->ddmabase+15) &1)
1304 printk(KERN_ERR "solo1: cannot start recording, DDMA mask bit stuck at 1\n");
1305 }else
1306 stop_adc(s);
1307 }
1308 if(file->f_mode & FMODE_WRITE) {
1309 if(val & PCM_ENABLE_OUTPUT) {
1310 if(!s->dma_dac.ready && (ret =prog_dmabuf_dac(s)))
1311 return ret;
1312 start_dac(s);
1313 }else
1314 stop_dac(s);
1315 }
1316 return0;
1317
1318 case SNDCTL_DSP_GETOSPACE:
1319 if(!(file->f_mode & FMODE_WRITE))
1320 return-EINVAL;
1321 if(!(s->ena & FMODE_WRITE) && (val =prog_dmabuf_dac(s)) !=0)
1322 return val;
1323 spin_lock_irqsave(&s->lock, flags);
1324 solo1_update_ptr(s);
1325  abinfo.fragsize = s->dma_dac.fragsize;
1326  abinfo.bytes = s->dma_dac.dmasize - s->dma_dac.count;
1327  abinfo.fragstotal = s->dma_dac.numfrag;
1328  abinfo.fragments = abinfo.bytes >> s->dma_dac.fragshift;
1329 spin_unlock_irqrestore(&s->lock, flags);
1330 returncopy_to_user((void*)arg, &abinfo,sizeof(abinfo)) ? -EFAULT :0;
1331
1332 case SNDCTL_DSP_GETISPACE:
1333 if(!(file->f_mode & FMODE_READ))
1334 return-EINVAL;
1335 if(!(s->ena & FMODE_READ) && (val =prog_dmabuf_adc(s)) !=0)
1336 return val;
1337 spin_lock_irqsave(&s->lock, flags);
1338 solo1_update_ptr(s);
1339  abinfo.fragsize = s->dma_adc.fragsize;
1340  abinfo.bytes = s->dma_adc.count;
1341  abinfo.fragstotal = s->dma_adc.numfrag;
1342  abinfo.fragments = abinfo.bytes >> s->dma_adc.fragshift;
1343 spin_unlock_irqrestore(&s->lock, flags);
1344 returncopy_to_user((void*)arg, &abinfo,sizeof(abinfo)) ? -EFAULT :0;
1345
1346 case SNDCTL_DSP_NONBLOCK:
1347  file->f_flags |= O_NONBLOCK;
1348 return0;
1349
1350 case SNDCTL_DSP_GETODELAY:
1351 if(!(file->f_mode & FMODE_WRITE))
1352 return-EINVAL;
1353 spin_lock_irqsave(&s->lock, flags);
1354 solo1_update_ptr(s);
1355  val = s->dma_dac.count;
1356 spin_unlock_irqrestore(&s->lock, flags);
1357 returnput_user(val, (int*)arg);
1358
1359 case SNDCTL_DSP_GETIPTR:
1360 if(!(file->f_mode & FMODE_READ))
1361 return-EINVAL;
1362 spin_lock_irqsave(&s->lock, flags);
1363 solo1_update_ptr(s);
1364  cinfo.bytes = s->dma_adc.total_bytes;
1365  cinfo.blocks = s->dma_adc.count >> s->dma_adc.fragshift;
1366  cinfo.ptr = s->dma_adc.hwptr;
1367 if(s->dma_adc.mapped)
1368  s->dma_adc.count &= s->dma_adc.fragsize-1;
1369 spin_unlock_irqrestore(&s->lock, flags);
1370 returncopy_to_user((void*)arg, &cinfo,sizeof(cinfo));
1371
1372 case SNDCTL_DSP_GETOPTR:
1373 if(!(file->f_mode & FMODE_WRITE))
1374 return-EINVAL;
1375 spin_lock_irqsave(&s->lock, flags);
1376 solo1_update_ptr(s);
1377  cinfo.bytes = s->dma_dac.total_bytes;
1378  cinfo.blocks = s->dma_dac.count >> s->dma_dac.fragshift;
1379  cinfo.ptr = s->dma_dac.hwptr;
1380 if(s->dma_dac.mapped)
1381  s->dma_dac.count &= s->dma_dac.fragsize-1;
1382 spin_unlock_irqrestore(&s->lock, flags);
1383 returncopy_to_user((void*)arg, &cinfo,sizeof(cinfo));
1384
1385 case SNDCTL_DSP_GETBLKSIZE:
1386 if(file->f_mode & FMODE_WRITE) {
1387 if((val =prog_dmabuf_dac(s)))
1388 return val;
1389 returnput_user(s->dma_dac.fragsize, (int*)arg);
1390 }
1391 if((val =prog_dmabuf_adc(s)))
1392 return val;
1393 returnput_user(s->dma_adc.fragsize, (int*)arg);
1394
1395 case SNDCTL_DSP_SETFRAGMENT:
1396 get_user_ret(val, (int*)arg, -EFAULT);
1397 if(file->f_mode & FMODE_READ) {
1398  s->dma_adc.ossfragshift = val &0xffff;
1399  s->dma_adc.ossmaxfrags = (val >>16) &0xffff;
1400 if(s->dma_adc.ossfragshift <4)
1401  s->dma_adc.ossfragshift =4;
1402 if(s->dma_adc.ossfragshift >15)
1403  s->dma_adc.ossfragshift =15;
1404 if(s->dma_adc.ossmaxfrags <4)
1405  s->dma_adc.ossmaxfrags =4;
1406 }
1407 if(file->f_mode & FMODE_WRITE) {
1408  s->dma_dac.ossfragshift = val &0xffff;
1409  s->dma_dac.ossmaxfrags = (val >>16) &0xffff;
1410 if(s->dma_dac.ossfragshift <4)
1411  s->dma_dac.ossfragshift =4;
1412 if(s->dma_dac.ossfragshift >15)
1413  s->dma_dac.ossfragshift =15;
1414 if(s->dma_dac.ossmaxfrags <4)
1415  s->dma_dac.ossmaxfrags =4;
1416 }
1417 return0;
1418
1419 case SNDCTL_DSP_SUBDIVIDE:
1420 if((file->f_mode & FMODE_READ && s->dma_adc.subdivision) ||
1421 (file->f_mode & FMODE_WRITE && s->dma_dac.subdivision))
1422 return-EINVAL;
1423 get_user_ret(val, (int*)arg, -EFAULT);
1424 if(val !=1&& val !=2&& val !=4)
1425 return-EINVAL;
1426 if(file->f_mode & FMODE_READ)
1427  s->dma_adc.subdivision = val;
1428 if(file->f_mode & FMODE_WRITE)
1429  s->dma_dac.subdivision = val;
1430 return0;
1431
1432 case SOUND_PCM_READ_RATE:
1433 returnput_user(s->rate, (int*)arg);
1434
1435 case SOUND_PCM_READ_CHANNELS:
1436 returnput_user(s->channels, (int*)arg);
1437
1438 case SOUND_PCM_READ_BITS:
1439 returnput_user((s->fmt & (AFMT_S8|AFMT_U8)) ?8:16, (int*)arg);
1440
1441 case SOUND_PCM_WRITE_FILTER:
1442 case SNDCTL_DSP_SETSYNCRO:
1443 case SOUND_PCM_READ_FILTER:
1444 return-EINVAL;
1445
1446 }
1447 returnmixer_ioctl(s, cmd, arg);
1448 }
1449
1450 static intsolo1_release(struct inode *inode,struct file *file)
1451 {
1452 struct solo1_state *s = (struct solo1_state *)file->private_data;
1453
1454 VALIDATE_STATE(s);
1455 if(file->f_mode & FMODE_WRITE)
1456 drain_dac(s, file->f_flags & O_NONBLOCK);
1457 down(&s->open_sem);
1458 if(file->f_mode & FMODE_WRITE) {
1459 stop_dac(s);
1460 outb(0, s->iobase+6);/* disable DMA */
1461 dealloc_dmabuf(&s->dma_dac);
1462 }
1463 if(file->f_mode & FMODE_READ) {
1464 stop_adc(s);
1465 outb(1, s->ddmabase+0xf);/* mask DMA channel */
1466 outb(0, s->ddmabase+0xd);/* DMA master clear */
1467 dealloc_dmabuf(&s->dma_adc);
1468 }
1469  s->open_mode &= ~(FMODE_READ | FMODE_WRITE);
1470 up(&s->open_sem);
1471 wake_up(&s->open_wait);
1472  MOD_DEC_USE_COUNT;
1473 return0;
1474 }
1475
1476 static intsolo1_open(struct inode *inode,struct file *file)
1477 {
1478 int minor =MINOR(inode->i_rdev);
1479 struct solo1_state *s = devs;
1480
1481 while(s && ((s->dev_audio ^ minor) & ~0xf))
1482  s = s->next;
1483 if(!s)
1484 return-ENODEV;
1485 VALIDATE_STATE(s);
1486  file->private_data = s;
1487 /* wait for device to become free */
1488 down(&s->open_sem);
1489 while(s->open_mode & (FMODE_READ | FMODE_WRITE)) {
1490 if(file->f_flags & O_NONBLOCK) {
1491 up(&s->open_sem);
1492 return-EBUSY;
1493 }
1494 up(&s->open_sem);
1495 interruptible_sleep_on(&s->open_wait);
1496 if(signal_pending(current))
1497 return-ERESTARTSYS;
1498 down(&s->open_sem);
1499 }
1500  s->fmt = AFMT_U8;
1501  s->channels =1;
1502  s->rate =8000;
1503  s->clkdiv =96|0x80;
1504  s->ena =0;
1505  s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags = s->dma_adc.subdivision =0;
1506  s->dma_dac.ossfragshift = s->dma_dac.ossmaxfrags = s->dma_dac.subdivision =0;
1507  s->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
1508 up(&s->open_sem);
1509  MOD_INC_USE_COUNT;
1510 if(prog_dmabuf_dac(s) ||prog_dmabuf_adc(s)) {
1511 solo1_release(inode, file);
1512 return-ENOMEM;
1513 }
1514 prog_codec(s);
1515 return0;
1516 }
1517
1518 static/*const*/struct file_operations solo1_audio_fops = {
1519 &solo1_llseek,
1520 &solo1_read,
1521 &solo1_write,
1522  NULL,/* readdir */
1523 &solo1_poll,
1524 &solo1_ioctl,
1525 &solo1_mmap,
1526 &solo1_open,
1527  NULL,/* flush */
1528 &solo1_release,
1529  NULL,/* fsync */
1530  NULL,/* fasync */
1531  NULL,/* check_media_change */
1532  NULL,/* revalidate */
1533  NULL,/* lock */
1534 };
1535
1536 /* --------------------------------------------------------------------- */
1537
1538 /* hold spinlock for the following! */
1539 static voidsolo1_handle_midi(struct solo1_state *s)
1540 {
1541 unsigned char ch;
1542 int wake;
1543
1544 if(!(s->mpubase))
1545 return;
1546  wake =0;
1547 while(!(inb(s->mpubase+1) &0x80)) {
1548  ch =inb(s->mpubase);
1549 if(s->midi.icnt < MIDIINBUF) {
1550  s->midi.ibuf[s->midi.iwr] = ch;
1551  s->midi.iwr = (s->midi.iwr +1) % MIDIINBUF;
1552  s->midi.icnt++;
1553 }
1554  wake =1;
1555 }
1556 if(wake)
1557 wake_up(&s->midi.iwait);
1558  wake =0;
1559 while(!(inb(s->mpubase+1) &0x40) && s->midi.ocnt >0) {
1560 outb(s->midi.obuf[s->midi.ord], s->mpubase);
1561  s->midi.ord = (s->midi.ord +1) % MIDIOUTBUF;
1562  s->midi.ocnt--;
1563 if(s->midi.ocnt < MIDIOUTBUF-16)
1564  wake =1;
1565 }
1566 if(wake)
1567 wake_up(&s->midi.owait);
1568 }
1569
1570 static voidsolo1_interrupt(int irq,void*dev_id,struct pt_regs *regs)
1571 {
1572 struct solo1_state *s = (struct solo1_state *)dev_id;
1573 unsigned int intsrc;
1574
1575 /* fastpath out, to ease interrupt sharing */
1576  intsrc =inb(s->iobase+7);/* get interrupt source(s) */
1577 if(!intsrc)
1578 return;
1579 (void)inb(s->sbbase+0xe);/* clear interrupt */
1580 spin_lock(&s->lock);
1581 /* clear audio interrupts first */
1582 if(intsrc &0x20)
1583 write_mixer(s,0x7a,read_mixer(s,0x7a) &0x7f);
1584 solo1_update_ptr(s);
1585 solo1_handle_midi(s);
1586 spin_unlock(&s->lock);
1587 }
1588
1589 static voidsolo1_midi_timer(unsigned long data)
1590 {
1591 struct solo1_state *s = (struct solo1_state *)data;
1592 unsigned long flags;
1593
1594 spin_lock_irqsave(&s->lock, flags);
1595 solo1_handle_midi(s);
1596 spin_unlock_irqrestore(&s->lock, flags);
1597  s->midi.timer.expires = jiffies+1;
1598 add_timer(&s->midi.timer);
1599 }
1600
1601 /* --------------------------------------------------------------------- */
1602
1603 static ssize_t solo1_midi_read(struct file *file,char*buffer,size_t count, loff_t *ppos)
1604 {
1605 struct solo1_state *s = (struct solo1_state *)file->private_data;
1606 DECLARE_WAITQUEUE(wait, current);
1607  ssize_t ret;
1608 unsigned long flags;
1609 unsigned ptr;
1610 int cnt;
1611
1612 VALIDATE_STATE(s);
1613 if(ppos != &file->f_pos)
1614 return-ESPIPE;
1615 if(!access_ok(VERIFY_WRITE, buffer, count))
1616 return-EFAULT;
1617 if(count ==0)
1618 return0;
1619  ret =0;
1620 add_wait_queue(&s->midi.iwait, &wait);
1621 while(count >0) {
1622 spin_lock_irqsave(&s->lock, flags);
1623  ptr = s->midi.ird;
1624  cnt = MIDIINBUF - ptr;
1625 if(s->midi.icnt < cnt)
1626  cnt = s->midi.icnt;
1627 spin_unlock_irqrestore(&s->lock, flags);
1628 if(cnt > count)
1629  cnt = count;
1630 if(cnt <=0) {
1631 if(file->f_flags & O_NONBLOCK) {
1632 if(!ret)
1633  ret = -EAGAIN;
1634 break;
1635 }
1636 __set_current_state(TASK_INTERRUPTIBLE);
1637 schedule();
1638 if(signal_pending(current)) {
1639 if(!ret)
1640  ret = -ERESTARTSYS;
1641 break;
1642 }
1643 continue;
1644 }
1645 if(copy_to_user(buffer, s->midi.ibuf + ptr, cnt)) {
1646 if(!ret)
1647  ret = -EFAULT;
1648 break;
1649 }
1650  ptr = (ptr + cnt) % MIDIINBUF;
1651 spin_lock_irqsave(&s->lock, flags);
1652  s->midi.ird = ptr;
1653  s->midi.icnt -= cnt;
1654 spin_unlock_irqrestore(&s->lock, flags);
1655  count -= cnt;
1656  buffer += cnt;
1657  ret += cnt;
1658 break;
1659 }
1660 __set_current_state(TASK_RUNNING);
1661 remove_wait_queue(&s->midi.iwait, &wait);
1662 return ret;
1663 }
1664
1665 static ssize_t solo1_midi_write(struct file *file,const char*buffer,size_t count, loff_t *ppos)
1666 {
1667 struct solo1_state *s = (struct solo1_state *)file->private_data;
1668 DECLARE_WAITQUEUE(wait, current);
1669  ssize_t ret;
1670 unsigned long flags;
1671 unsigned ptr;
1672 int cnt;
1673
1674 VALIDATE_STATE(s);
1675 if(ppos != &file->f_pos)
1676 return-ESPIPE;
1677 if(!access_ok(VERIFY_READ, buffer, count))
1678 return-EFAULT;
1679 if(count ==0)
1680 return0;
1681  ret =0;
1682 add_wait_queue(&s->midi.owait, &wait);
1683 while(count >0) {
1684 spin_lock_irqsave(&s->lock, flags);
1685  ptr = s->midi.owr;
1686  cnt = MIDIOUTBUF - ptr;
1687 if(s->midi.ocnt + cnt > MIDIOUTBUF)
1688  cnt = MIDIOUTBUF - s->midi.ocnt;
1689 if(cnt <=0)
1690 solo1_handle_midi(s);
1691 spin_unlock_irqrestore(&s->lock, flags);
1692 if(cnt > count)
1693  cnt = count;
1694 if(cnt <=0) {
1695 if(file->f_flags & O_NONBLOCK) {
1696 if(!ret)
1697  ret = -EAGAIN;
1698 break;
1699 }
1700 __set_current_state(TASK_INTERRUPTIBLE);
1701 schedule();
1702 if(signal_pending(current)) {
1703 if(!ret)
1704  ret = -ERESTARTSYS;
1705 break;
1706 }
1707 continue;
1708 }
1709 if(copy_from_user(s->midi.obuf + ptr, buffer, cnt)) {
1710 if(!ret)
1711  ret = -EFAULT;
1712 break;
1713 }
1714  ptr = (ptr + cnt) % MIDIOUTBUF;
1715 spin_lock_irqsave(&s->lock, flags);
1716  s->midi.owr = ptr;
1717  s->midi.ocnt += cnt;
1718 spin_unlock_irqrestore(&s->lock, flags);
1719  count -= cnt;
1720  buffer += cnt;
1721  ret += cnt;
1722 spin_lock_irqsave(&s->lock, flags);
1723 solo1_handle_midi(s);
1724 spin_unlock_irqrestore(&s->lock, flags);
1725 }
1726 __set_current_state(TASK_RUNNING);
1727 remove_wait_queue(&s->midi.owait, &wait);
1728 return ret;
1729 }
1730
1731 static unsigned intsolo1_midi_poll(struct file *file,struct poll_table_struct *wait)
1732 {
1733 struct solo1_state *s = (struct solo1_state *)file->private_data;
1734 unsigned long flags;
1735 unsigned int mask =0;
1736
1737 VALIDATE_STATE(s);
1738 if(file->f_flags & FMODE_WRITE)
1739 poll_wait(file, &s->midi.owait, wait);
1740 if(file->f_flags & FMODE_READ)
1741 poll_wait(file, &s->midi.iwait, wait);
1742 spin_lock_irqsave(&s->lock, flags);
1743 if(file->f_flags & FMODE_READ) {
1744 if(s->midi.icnt >0)
1745  mask |= POLLIN | POLLRDNORM;
1746 }
1747 if(file->f_flags & FMODE_WRITE) {
1748 if(s->midi.ocnt < MIDIOUTBUF)
1749  mask |= POLLOUT | POLLWRNORM;
1750 }
1751 spin_unlock_irqrestore(&s->lock, flags);
1752 return mask;
1753 }
1754
1755 static intsolo1_midi_open(struct inode *inode,struct file *file)
1756 {
1757 int minor =MINOR(inode->i_rdev);
1758 struct solo1_state *s = devs;
1759 unsigned long flags;
1760
1761 while(s && s->dev_midi != minor)
1762  s = s->next;
1763 if(!s)
1764 return-ENODEV;
1765 VALIDATE_STATE(s);
1766  file->private_data = s;
1767 /* wait for device to become free */
1768 down(&s->open_sem);
1769 while(s->open_mode & (file->f_mode << FMODE_MIDI_SHIFT)) {
1770 if(file->f_flags & O_NONBLOCK) {
1771 up(&s->open_sem);
1772 return-EBUSY;
1773 }
1774 up(&s->open_sem);
1775 interruptible_sleep_on(&s->open_wait);
1776 if(signal_pending(current))
1777 return-ERESTARTSYS;
1778 down(&s->open_sem);
1779 }
1780 spin_lock_irqsave(&s->lock, flags);
1781 if(!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
1782  s->midi.ird = s->midi.iwr = s->midi.icnt =0;
1783  s->midi.ord = s->midi.owr = s->midi.ocnt =0;
1784 outb(0xff, s->mpubase+1);/* reset command */
1785 outb(0x3f, s->mpubase+1);/* uart command */
1786 if(!(inb(s->mpubase+1) &0x80))
1787 inb(s->mpubase);
1788  s->midi.ird = s->midi.iwr = s->midi.icnt =0;
1789 outb(0xb0, s->iobase +7);/* enable A1, A2, MPU irq's */
1790 init_timer(&s->midi.timer);
1791  s->midi.timer.expires = jiffies+1;
1792  s->midi.timer.data = (unsigned long)s;
1793  s->midi.timer.function = solo1_midi_timer;
1794 add_timer(&s->midi.timer);
1795 }
1796 if(file->f_mode & FMODE_READ) {
1797  s->midi.ird = s->midi.iwr = s->midi.icnt =0;
1798 }
1799 if(file->f_mode & FMODE_WRITE) {
1800  s->midi.ord = s->midi.owr = s->midi.ocnt =0;
1801 }
1802 spin_unlock_irqrestore(&s->lock, flags);
1803  s->open_mode |= (file->f_mode << FMODE_MIDI_SHIFT) & (FMODE_MIDI_READ | FMODE_MIDI_WRITE);
1804 up(&s->open_sem);
1805  MOD_INC_USE_COUNT;
1806 return0;
1807 }
1808
1809 static intsolo1_midi_release(struct inode *inode,struct file *file)
1810 {
1811 struct solo1_state *s = (struct solo1_state *)file->private_data;
1812 DECLARE_WAITQUEUE(wait, current);
1813 unsigned long flags;
1814 unsigned count, tmo;
1815
1816 VALIDATE_STATE(s);
1817
1818 if(file->f_mode & FMODE_WRITE) {
1819 __set_current_state(TASK_INTERRUPTIBLE);
1820 add_wait_queue(&s->midi.owait, &wait);
1821 for(;;) {
1822 spin_lock_irqsave(&s->lock, flags);
1823  count = s->midi.ocnt;
1824 spin_unlock_irqrestore(&s->lock, flags);
1825 if(count <=0)
1826 break;
1827 if(signal_pending(current))
1828 break;
1829 if(file->f_flags & O_NONBLOCK) {
1830 remove_wait_queue(&s->midi.owait, &wait);
1831 set_current_state(TASK_RUNNING);
1832 return-EBUSY;
1833 }
1834  tmo = (count * HZ) /3100;
1835 if(!schedule_timeout(tmo ? :1) && tmo)
1836 printk(KERN_DEBUG "solo1: midi timed out??\n");
1837 }
1838 remove_wait_queue(&s->midi.owait, &wait);
1839 set_current_state(TASK_RUNNING);
1840 }
1841 down(&s->open_sem);
1842  s->open_mode &= (~(file->f_mode << FMODE_MIDI_SHIFT)) & (FMODE_MIDI_READ|FMODE_MIDI_WRITE);
1843 spin_lock_irqsave(&s->lock, flags);
1844 if(!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
1845 outb(0x30, s->iobase +7);/* enable A1, A2 irq's */
1846 del_timer(&s->midi.timer);
1847 }
1848 spin_unlock_irqrestore(&s->lock, flags);
1849 up(&s->open_sem);
1850 wake_up(&s->open_wait);
1851  MOD_DEC_USE_COUNT;
1852 return0;
1853 }
1854
1855 static/*const*/struct file_operations solo1_midi_fops = {
1856 &solo1_llseek,
1857 &solo1_midi_read,
1858 &solo1_midi_write,
1859  NULL,/* readdir */
1860 &solo1_midi_poll,
1861  NULL,/* ioctl */
1862  NULL,/* mmap */
1863 &solo1_midi_open,
1864  NULL,/* flush */
1865 &solo1_midi_release,
1866  NULL,/* fsync */
1867  NULL,/* fasync */
1868  NULL,/* check_media_change */
1869  NULL,/* revalidate */
1870  NULL,/* lock */
1871 };
1872
1873 /* --------------------------------------------------------------------- */
1874
1875 static intsolo1_dmfm_ioctl(struct inode *inode,struct file *file,unsigned int cmd,unsigned long arg)
1876 {
1877 static const unsigned char op_offset[18] = {
1878 0x00,0x01,0x02,0x03,0x04,0x05,
1879 0x08,0x09,0x0A,0x0B,0x0C,0x0D,
1880 0x10,0x11,0x12,0x13,0x14,0x15
1881 };
1882 struct solo1_state *s = (struct solo1_state *)file->private_data;
1883 struct dm_fm_voice v;
1884 struct dm_fm_note n;
1885 struct dm_fm_params p;
1886 unsigned int io;
1887 unsigned int regb;
1888
1889 switch(cmd) {
1890 case FM_IOCTL_RESET:
1891 for(regb =0xb0; regb <0xb9; regb++) {
1892 outb(regb, s->sbbase);
1893 outb(0, s->sbbase+1);
1894 outb(regb, s->sbbase+2);
1895 outb(0, s->sbbase+3);
1896 }
1897 return0;
1898
1899 case FM_IOCTL_PLAY_NOTE:
1900 if(copy_from_user(&n, (void*)arg,sizeof(n)))
1901 return-EFAULT;
1902 if(n.voice >=18)
1903 return-EINVAL;
1904 if(n.voice >=9) {
1905  regb = n.voice -9;
1906  io = s->sbbase+2;
1907 }else{
1908  regb = n.voice;
1909  io = s->sbbase;
1910 }
1911 outb(0xa0+ regb, io);
1912 outb(n.fnum &0xff, io+1);
1913 outb(0xb0+ regb, io);
1914 outb(((n.fnum >>8) &3) | ((n.octave &7) <<2) | ((n.key_on &1) <<5), io+1);
1915 return0;
1916
1917 case FM_IOCTL_SET_VOICE:
1918 if(copy_from_user(&v, (void*)arg,sizeof(v)))
1919 return-EFAULT;
1920 if(v.voice >=18)
1921 return-EINVAL;
1922  regb = op_offset[v.voice];
1923  io = s->sbbase + ((v.op &1) <<1);
1924 outb(0x20+ regb, io);
1925 outb(((v.am &1) <<7) | ((v.vibrato &1) <<6) | ((v.do_sustain &1) <<5) |
1926 ((v.kbd_scale &1) <<4) | (v.harmonic &0xf), io+1);
1927 outb(0x40+ regb, io);
1928 outb(((v.scale_level &0x3) <<6) | (v.volume &0x3f), io+1);
1929 outb(0x60+ regb, io);
1930 outb(((v.attack &0xf) <<4) | (v.decay &0xf), io+1);
1931 outb(0x80+ regb, io);
1932 outb(((v.sustain &0xf) <<4) | (v.release &0xf), io+1);
1933 outb(0xe0+ regb, io);
1934 outb(v.waveform &0x7, io+1);
1935 if(n.voice >=9) {
1936  regb = n.voice -9;
1937  io = s->sbbase+2;
1938 }else{
1939  regb = n.voice;
1940  io = s->sbbase;
1941 }
1942 outb(0xc0+ regb, io);
1943 outb(((v.right &1) <<5) | ((v.left &1) <<4) | ((v.feedback &7) <<1) |
1944 (v.connection &1), io+1);
1945 return0;
1946
1947 case FM_IOCTL_SET_PARAMS:
1948 if(copy_from_user(&p, (void*)arg,sizeof(p)))
1949 return-EFAULT;
1950 outb(0x08, s->sbbase);
1951 outb((p.kbd_split &1) <<6, s->sbbase+1);
1952 outb(0xbd, s->sbbase);
1953 outb(((p.am_depth &1) <<7) | ((p.vib_depth &1) <<6) | ((p.rhythm &1) <<5) | ((p.bass &1) <<4) |
1954 ((p.snare &1) <<3) | ((p.tomtom &1) <<2) | ((p.cymbal &1) <<1) | (p.hihat &1), s->sbbase+1);
1955 return0;
1956
1957 case FM_IOCTL_SET_OPL:
1958 outb(4, s->sbbase+2);
1959 outb(arg, s->sbbase+3);
1960 return0;
1961
1962 case FM_IOCTL_SET_MODE:
1963 outb(5, s->sbbase+2);
1964 outb(arg &1, s->sbbase+3);
1965 return0;
1966
1967 default:
1968 return-EINVAL;
1969 }
1970 }
1971
1972 static intsolo1_dmfm_open(struct inode *inode,struct file *file)
1973 {
1974 int minor =MINOR(inode->i_rdev);
1975 struct solo1_state *s = devs;
1976
1977 while(s && s->dev_dmfm != minor)
1978  s = s->next;
1979 if(!s)
1980 return-ENODEV;
1981 VALIDATE_STATE(s);
1982  file->private_data = s;
1983 /* wait for device to become free */
1984 down(&s->open_sem);
1985 while(s->open_mode & FMODE_DMFM) {
1986 if(file->f_flags & O_NONBLOCK) {
1987 up(&s->open_sem);
1988 return-EBUSY;
1989 }
1990 up(&s->open_sem);
1991 interruptible_sleep_on(&s->open_wait);
1992 if(signal_pending(current))
1993 return-ERESTARTSYS;
1994 down(&s->open_sem);
1995 }
1996 /* init the stuff */
1997 outb(1, s->sbbase);
1998 outb(0x20, s->sbbase+1);/* enable waveforms */
1999 outb(4, s->sbbase+2);
2000 outb(0, s->sbbase+3);/* no 4op enabled */
2001 outb(5, s->sbbase+2);
2002 outb(1, s->sbbase+3);/* enable OPL3 */
2003  s->open_mode |= FMODE_DMFM;
2004 up(&s->open_sem);
2005  MOD_INC_USE_COUNT;
2006 return0;
2007 }
2008
2009 static intsolo1_dmfm_release(struct inode *inode,struct file *file)
2010 {
2011 struct solo1_state *s = (struct solo1_state *)file->private_data;
2012 unsigned int regb;
2013
2014 VALIDATE_STATE(s);
2015 down(&s->open_sem);
2016  s->open_mode &= ~FMODE_DMFM;
2017 for(regb =0xb0; regb <0xb9; regb++) {
2018 outb(regb, s->sbbase);
2019 outb(0, s->sbbase+1);
2020 outb(regb, s->sbbase+2);
2021 outb(0, s->sbbase+3);
2022 }
2023 up(&s->open_sem);
2024 wake_up(&s->open_wait);
2025  MOD_DEC_USE_COUNT;
2026 return0;
2027 }
2028
2029 static/*const*/struct file_operations solo1_dmfm_fops = {
2030 &solo1_llseek,
2031  NULL,/* read */
2032  NULL,/* write */
2033  NULL,/* readdir */
2034  NULL,/* poll */
2035 &solo1_dmfm_ioctl,
2036  NULL,/* mmap */
2037 &solo1_dmfm_open,
2038  NULL,/* flush */
2039 &solo1_dmfm_release,
2040  NULL,/* fsync */
2041  NULL,/* fasync */
2042  NULL,/* check_media_change */
2043  NULL,/* revalidate */
2044  NULL,/* lock */
2045 };
2046
2047 /* --------------------------------------------------------------------- */
2048
2049 /* maximum number of devices */
2050 #define NR_DEVICE 5
2051
2052 /* --------------------------------------------------------------------- */
2053
2054 static struct initvol {
2055 int mixch;
2056 int vol;
2057 } initvol[] __initdata = {
2058 { SOUND_MIXER_WRITE_VOLUME,0x4040},
2059 { SOUND_MIXER_WRITE_PCM,0x4040},
2060 { SOUND_MIXER_WRITE_SYNTH,0x4040},
2061 { SOUND_MIXER_WRITE_CD,0x4040},
2062 { SOUND_MIXER_WRITE_LINE,0x4040},
2063 { SOUND_MIXER_WRITE_LINE1,0x4040},
2064 { SOUND_MIXER_WRITE_LINE2,0x4040},
2065 { SOUND_MIXER_WRITE_RECLEV,0x4040},
2066 { SOUND_MIXER_WRITE_SPEAKER,0x4040},
2067 { SOUND_MIXER_WRITE_MIC,0x4040}
2068 };
2069
2070 #define RSRCISIOREGION(dev,num) ((dev)->resource[(num)].start != 0 && \
2071  ((dev)->resource[(num)].flags & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_IO)
2072 #define RSRCADDRESS(dev,num) ((dev)->resource[(num)].start)
2073
2074
2075 static int __init init_solo1(void)
2076 {
2077 struct solo1_state *s;
2078 struct pci_dev *pcidev = NULL;
2079  mm_segment_t fs;
2080 int i, val, index =0;
2081
2082 if(!pci_present())/* No PCI bus in this machine! */
2083 return-ENODEV;
2084 printk(KERN_INFO "solo1: version v0.7 time " __TIME__ " " __DATE__ "\n");
2085 while(index < NR_DEVICE &&
2086 (pcidev =pci_find_device(PCI_VENDOR_ID_ESS, PCI_DEVICE_ID_ESS_SOLO1, pcidev))) {
2087 if(!RSRCISIOREGION(pcidev,0) ||
2088 !RSRCISIOREGION(pcidev,1) ||
2089 !RSRCISIOREGION(pcidev,2) ||
2090 !RSRCISIOREGION(pcidev,3))
2091 continue;
2092 if(pcidev->irq ==0)
2093 continue;
2094 if(!(s =kmalloc(sizeof(struct solo1_state), GFP_KERNEL))) {
2095 printk(KERN_WARNING "solo1: out of memory\n");
2096 continue;
2097 }
2098 memset(s,0,sizeof(struct solo1_state));
2099 init_waitqueue_head(&s->dma_adc.wait);
2100 init_waitqueue_head(&s->dma_dac.wait);
2101 init_waitqueue_head(&s->open_wait);
2102 init_waitqueue_head(&s->midi.iwait);
2103 init_waitqueue_head(&s->midi.owait);
2104 init_MUTEX(&s->open_sem);
2105 spin_lock_init(&s->lock);
2106  s->magic = SOLO1_MAGIC;
2107  s->pcidev = pcidev;
2108  s->iobase =RSRCADDRESS(pcidev,0);
2109  s->sbbase =RSRCADDRESS(pcidev,1);
2110  s->vcbase =RSRCADDRESS(pcidev,2);
2111  s->ddmabase = s->vcbase + DDMABASE_OFFSET;
2112  s->mpubase =RSRCADDRESS(pcidev,3);
2113  s->gpbase =RSRCADDRESS(pcidev,4);
2114  s->irq = pcidev->irq;
2115 if(check_region(s->iobase, IOBASE_EXTENT) ||
2116 check_region(s->sbbase, SBBASE_EXTENT) ||
2117 check_region(s->ddmabase, DDMABASE_EXTENT) ||
2118 check_region(s->mpubase, MPUBASE_EXTENT)) {
2119 printk(KERN_ERR "solo1: io ports in use\n");
2120 goto err_region;
2121 }
2122 request_region(s->iobase, IOBASE_EXTENT,"ESS Solo1");
2123 request_region(s->sbbase, SBBASE_EXTENT,"ESS Solo1");
2124 request_region(s->ddmabase, DDMABASE_EXTENT,"ESS Solo1");
2125 request_region(s->mpubase, MPUBASE_EXTENT,"ESS Solo1");
2126 if(request_irq(s->irq, solo1_interrupt, SA_SHIRQ,"ESS Solo1", s)) {
2127 printk(KERN_ERR "solo1: irq %u in use\n", s->irq);
2128 goto err_irq;
2129 }
2130 /* initialize DDMA base address */
2131 printk(KERN_DEBUG "solo1: ddma base address: 0x%lx\n", s->ddmabase);
2132 pci_write_config_word(pcidev,0x60, (s->ddmabase & (~0xf)) |1);
2133 /* set DMA policy to DDMA, IRQ emulation off (CLKRUN disabled for now) */
2134 pci_write_config_dword(pcidev,0x50,0);
2135 /* disable legacy audio address decode */
2136 pci_write_config_word(pcidev,0x40,0x907f);
2137
2138 printk(KERN_INFO "solo1: joystick port at %#lx\n", s->gpbase+1);
2139
2140 /* register devices */
2141 if((s->dev_audio =register_sound_dsp(&solo1_audio_fops, -1)) <0)
2142 goto err_dev1;
2143 if((s->dev_mixer =register_sound_mixer(&solo1_mixer_fops, -1)) <0)
2144 goto err_dev2;
2145 if((s->dev_midi =register_sound_midi(&solo1_midi_fops, -1)) <0)
2146 goto err_dev3;
2147 if((s->dev_dmfm =register_sound_special(&solo1_dmfm_fops,15/* ?? */)) <0)
2148 goto err_dev4;
2149 /* initialize the chips */
2150 outb(0xb0, s->iobase+7);/* enable A1, A2, MPU irq's */
2151
2152 /* initialize mixer regs */
2153 write_mixer(s,0x7f,0);/* disable music digital recording */
2154 write_mixer(s,0x7d,0x0c);/* enable mic preamp, MONO_OUT is 2nd DAC right channel */
2155 write_mixer(s,0x64,0x45);/* volume control */
2156 write_mixer(s,0x48,0x10);/* enable music DAC/ES6xx interface */
2157 write_mixer(s,0x50,0);/* disable spatializer */
2158 write_mixer(s,0x52,0);
2159 write_mixer(s,0x14,0);/* DAC1 minimum volume */
2160 write_mixer(s,0x71,0x20);/* enable new 0xA1 reg format */
2161 outb(0, s->ddmabase+0xd);/* DMA master clear */
2162 outb(1, s->ddmabase+0xf);/* mask channel */
2163 /*outb(0, s->ddmabase+0x8);*//* enable controller (enable is low active!!) */
2164
2165 pci_set_master(pcidev);/* enable bus mastering */
2166
2167  fs =get_fs();
2168 set_fs(KERNEL_DS);
2169  val = SOUND_MASK_LINE;
2170 mixer_ioctl(s, SOUND_MIXER_WRITE_RECSRC, (unsigned long)&val);
2171 for(i =0; i <sizeof(initvol)/sizeof(initvol[0]); i++) {
2172  val = initvol[i].vol;
2173 mixer_ioctl(s, initvol[i].mixch, (unsigned long)&val);
2174 }
2175  val =1;/* enable mic preamp */
2176 mixer_ioctl(s, SOUND_MIXER_PRIVATE1, (unsigned long)&val);
2177 set_fs(fs);
2178 /* queue it for later freeing */
2179  s->next = devs;
2180  devs = s;
2181  index++;
2182 continue;
2183
2184  err_dev4:
2185 unregister_sound_dsp(s->dev_midi);
2186  err_dev3:
2187 unregister_sound_mixer(s->dev_mixer);
2188  err_dev2:
2189 unregister_sound_dsp(s->dev_audio);
2190  err_dev1:
2191 printk(KERN_ERR "solo1: cannot register misc device\n");
2192 free_irq(s->irq, s);
2193  err_irq:
2194 release_region(s->iobase, IOBASE_EXTENT);
2195 release_region(s->sbbase, SBBASE_EXTENT);
2196 release_region(s->ddmabase, DDMABASE_EXTENT);
2197 release_region(s->mpubase, MPUBASE_EXTENT);
2198  err_region:
2199 kfree_s(s,sizeof(struct solo1_state));
2200 }
2201 if(!devs)
2202 return-ENODEV;
2203 return0;
2204 }
2205
2206 /* --------------------------------------------------------------------- */
2207
2208 MODULE_AUTHOR("Thomas M. Sailer, sailer@ife.ee.ethz.ch, hb9jnx@hb9w.che.eu");
2209 MODULE_DESCRIPTION("ESS Solo1 Driver");
2210
2211 static void __exit cleanup_solo1(void)
2212 {
2213 struct solo1_state *s;
2214
2215 while((s = devs)) {
2216  devs = devs->next;
2217 /* stop DMA controller */
2218 outb(0, s->iobase+6);
2219 outb(0, s->ddmabase+0xd);/* DMA master clear */
2220 outb(3, s->sbbase+6);/* reset sequencer and FIFO */
2221 synchronize_irq();
2222 pci_write_config_word(s->pcidev,0x60,0);/* turn off DDMA controller address space */
2223 free_irq(s->irq, s);
2224 release_region(s->iobase, IOBASE_EXTENT);
2225 release_region(s->sbbase, SBBASE_EXTENT);
2226 release_region(s->ddmabase, DDMABASE_EXTENT);
2227 release_region(s->mpubase, MPUBASE_EXTENT);
2228 unregister_sound_dsp(s->dev_audio);
2229 unregister_sound_mixer(s->dev_mixer);
2230 unregister_sound_midi(s->dev_midi);
2231 unregister_sound_special(s->dev_dmfm);
2232 kfree_s(s,sizeof(struct solo1_state));
2233 }
2234 printk(KERN_INFO "solo1: unloading\n");
2235 }
2236
2237 /* --------------------------------------------------------------------- */
2238
2239 module_init(init_solo1);
2240 module_exit(cleanup_solo1);
2241