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[SPIR-V] Fix OpVectorShuffle operands on load#135954

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Merged
merged 2 commits into from
Apr 22, 2025

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Keenuts
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The generated OpVectorShuffle was wrong, as the indices we pass are not to select the vector to sample from, but the position in the vector.

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@llvm/pr-subscribers-backend-spir-v

Author: Nathan Gauër (Keenuts)

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The generated OpVectorShuffle was wrong, as the indices we pass are not to select the vector to sample from, but the position in the vector.


Full diff: https://github.com/llvm/llvm-project/pull/135954.diff

2 Files Affected:

  • (modified) llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp (+3-2)
  • (modified) llvm/test/CodeGen/SPIRV/pointers/getelementptr-downcast-vector.ll (+4-4)
diff --git a/llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp b/llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp index 5ba4fbb02560d..69051132cacff 100644 --- a/llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp+++ b/llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp@@ -81,8 +81,9 @@ class SPIRVLegalizePointerCast : public FunctionPass { LoadInst *NewLoad = B.CreateLoad(SourceType, Source); buildAssignType(B, SourceType, NewLoad); - SmallVector<int> Mask(/* Size= */ TargetType->getNumElements(),- /* Value= */ 0);+ SmallVector<int> Mask(/* Size= */ TargetType->getNumElements());+ for (unsigned I = 0; I < TargetType->getNumElements(); ++I)+ Mask[I] = I; Value *Output = B.CreateShuffleVector(NewLoad, NewLoad, Mask); buildAssignType(B, TargetType, Output); return Output; diff --git a/llvm/test/CodeGen/SPIRV/pointers/getelementptr-downcast-vector.ll b/llvm/test/CodeGen/SPIRV/pointers/getelementptr-downcast-vector.ll index d4131fa8a2658..1287a512ac96d 100644 --- a/llvm/test/CodeGen/SPIRV/pointers/getelementptr-downcast-vector.ll+++ b/llvm/test/CodeGen/SPIRV/pointers/getelementptr-downcast-vector.ll@@ -19,7 +19,7 @@ define internal spir_func <3 x i32> @foo(ptr addrspace(10) %a) { ; partial loading of a vector: v4 -> v3. %2 = load <3 x i32>, ptr addrspace(10) %1, align 16 ; CHECK: %[[#load:]] = OpLoad %[[#v4]] %[[#tmp]] Aligned 16 -; CHECK: %[[#val:]] = OpVectorShuffle %[[#v3]] %[[#load]] %[[#load]] 0 0 0+; CHECK: %[[#val:]] = OpVectorShuffle %[[#v3]] %[[#load]] %[[#load]] 0 1 2 ret <3 x i32> %2 ; CHECK: OpReturnValue %[[#val]] @@ -33,7 +33,7 @@ define internal spir_func <3 x i32> @fooDefault(ptr %a) { ; partial loading of a vector: v4 -> v3. %2 = load <3 x i32>, ptr %1, align 16 ; CHECK: %[[#load:]] = OpLoad %[[#v4]] %[[#tmp]] Aligned 16 -; CHECK: %[[#val:]] = OpVectorShuffle %[[#v3]] %[[#load]] %[[#load]] 0 0 0+; CHECK: %[[#val:]] = OpVectorShuffle %[[#v3]] %[[#load]] %[[#load]] 0 1 2 ret <3 x i32> %2 ; CHECK: OpReturnValue %[[#val]] @@ -47,7 +47,7 @@ define internal spir_func <3 x i32> @fooBounds(ptr %a) { ; partial loading of a vector: v4 -> v3. %2 = load <3 x i32>, ptr %1, align 16 ; CHECK: %[[#load:]] = OpLoad %[[#v4]] %[[#tmp]] Aligned 16 -; CHECK: %[[#val:]] = OpVectorShuffle %[[#v3]] %[[#load]] %[[#load]] 0 0 0+; CHECK: %[[#val:]] = OpVectorShuffle %[[#v3]] %[[#load]] %[[#load]] 0 1 2 ret <3 x i32> %2 ; CHECK: OpReturnValue %[[#val]] @@ -61,7 +61,7 @@ define internal spir_func <2 x i32> @bar(ptr addrspace(10) %a) { ; partial loading of a vector: v4 -> v2. %2 = load <2 x i32>, ptr addrspace(10) %1, align 16 ; CHECK: %[[#load:]] = OpLoad %[[#v4]] %[[#tmp]] Aligned 16 -; CHECK: %[[#val:]] = OpVectorShuffle %[[#v2]] %[[#load]] %[[#load]] 0 0+; CHECK: %[[#val:]] = OpVectorShuffle %[[#v2]] %[[#load]] %[[#load]] 0 1 ret <2 x i32> %2 ; CHECK: OpReturnValue %[[#val]] 
The generated OpVectorShuffle was wrong, as the indices we pass are not to select the vector to sample from, but the position in the vector.
@KeenutsKeenutsforce-pushed the fix-ptrcast-load-vecshuffle branch from f28dc6e to dbeaab9CompareApril 16, 2025 13:13
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Build failure seems unrelated. We got 2 broken SPIR-V tests: smoothstep & SV_GroupIndex, those are caused by a recently added validation in Vulkan1.3 which disallow the Linkage capability.
Unrelated to this PR.

@KeenutsKeenuts merged commit d8b0e61 into llvm:mainApr 22, 2025
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@KeenutsKeenuts deleted the fix-ptrcast-load-vecshuffle branch April 22, 2025 09:07
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