drivers/sound/cmpci.c

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 1 /*****************************************************************************/
 2
 3 /*
 4  * cmpci.c -- C-Media PCI audio driver.
 5  *
 6  * Copyright (C) 1999 ChenLi Tien (cltien@home.com)
 7  *
 8  * Based on the PCI drivers by Thomas Sailer (sailer@ife.ee.ethz.ch)
 9  *
 10  * This program is free software; you can redistribute it and/or modify
 11  * it under the terms of the GNU General Public License as published by
 12  * the Free Software Foundation; either version 2 of the License, or
 13  * (at your option) any later version.
 14  *
 15  * This program is distributed in the hope that it will be useful,
 16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
 17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 18  * GNU General Public License for more details.
 19  *
 20  * You should have received a copy of the GNU General Public License
 21  * along with this program; if not, write to the Free Software
 22  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 23  *
 24  * Special thanks to David C. Niemi, Jan Pfeifer
 25  *
 26  *
 27  * Module command line parameters:
 28  * none so far
 29  *
 30  *
 31  * Supported devices:
 32  * /dev/dsp standard /dev/dsp device, (mostly) OSS compatible
 33  * /dev/mixer standard /dev/mixer device, (mostly) OSS compatible
 34  * /dev/midi simple MIDI UART interface, no ioctl
 35  *
 36  * The card has both an FM and a Wavetable synth, but I have to figure
 37  * out first how to drive them...
 38  *
 39  * Revision history
 40  * 06.05.98 0.1 Initial release
 41  * 10.05.98 0.2 Fixed many bugs, esp. ADC rate calculation
 42  * First stab at a simple midi interface (no bells&whistles)
 43  * 13.05.98 0.3 Fix stupid cut&paste error: set_adc_rate was called instead of
 44  * set_dac_rate in the FMODE_WRITE case in cm_open
 45  * Fix hwptr out of bounds (now mpg123 works)
 46  * 14.05.98 0.4 Don't allow excessive interrupt rates
 47  * 08.06.98 0.5 First release using Alan Cox' soundcore instead of miscdevice
 48  * 03.08.98 0.6 Do not include modversions.h
 49  * Now mixer behaviour can basically be selected between
 50  * "OSS documented" and "OSS actual" behaviour
 51  * 31.08.98 0.7 Fix realplayer problems - dac.count issues
 52  * 10.12.98 0.8 Fix drain_dac trying to wait on not yet initialized DMA
 53  * 16.12.98 0.9 Fix a few f_file & FMODE_ bugs
 54  * 06.01.99 0.10 remove the silly SA_INTERRUPT flag.
 55  * hopefully killed the egcs section type conflict
 56  * 12.03.99 0.11 cinfo.blocks should be reset after GETxPTR ioctl.
 57  * reported by Johan Maes <joma@telindus.be>
 58  * 22.03.99 0.12 return EAGAIN instead of EBUSY when O_NONBLOCK
 59  * read/write cannot be executed
 60  * 20 09 99 0.13 merged the generic changes in sonicvibes since this
 61  * diverged.
 62  * 18.08.99 1.5 Only deallocate DMA buffer when unloading.
 63  * 02.09.99 1.6 Enable SPDIF LOOP
 64  * Change the mixer read back
 65  * 21.09.99 2.33 Use RCS version as driver version.
 66  * Add support for modem, S/PDIF loop and 4 channels.
 67  * (8738 only)
 68  * Fix bug cause x11amp cannot play.
 69  * $Log: cmpci.c,v $
 70  * Revision 2.41 1999/10/27 02:00:05 cltien
 71  * Now the fragsize for modem is activated by parameter.
 72  *
 73  * Revision 2.40 1999/10/26 23:38:26 cltien
 74  * Remove debugging message in cm_write which may cause module counter not 0.
 75  *
 76  * Revision 2.39 1999/10/26 21:52:50 cltien
 77  * I forgor too adjust mic recording volume, as it should be moved to 5MUTEMONO.
 78  * Change the DYNAMIC macro to FIXEDDMA, which means static DMA buffer.
 79  *
 80  * Revision 2.38 1999/10/08 21:59:03 cltien
 81  * Set FLINKON and reset FLINKOFF for modem.
 82  *
 83  * Revision 2.37 1999/09/28 02:57:04 cltien
 84  * Add set_bus_master() to make sure bus master enabled.
 85  *
 86  * Revision 2.36 1999/09/22 14:15:03 cltien
 87  * Use open_sem to avoid multiple access to open_mode.
 88  * Use wakeup in IntrClose to activate process in waiting queue.
 89  *
 90  * Revision 2.35 1999/09/22 13:20:53 cltien
 91  * Use open_mode to check if DAC in used. Also more check in IntrWrite and IntrClose. Now the modem can access DAC safely.
 92  *
 93  * Revision 2.34 1999/09/22 03:29:57 cltien
 94  * Use module count to decide which one to access the dac.
 95  *
 96  *
 97  */
 98
 99 /*****************************************************************************/
 100
 101 #include <linux/config.h>
 102 #include <linux/version.h>
 103 #include <linux/module.h>
 104 #include <linux/string.h>
 105 #include <linux/ioport.h>
 106 #include <linux/sched.h>
 107 #include <linux/delay.h>
 108 #include <linux/sound.h>
 109 #include <linux/malloc.h>
 110 #include <linux/soundcard.h>
 111 #include <linux/pci.h>
 112 #include <linux/wrapper.h>
 113 #include <asm/io.h>
 114 #include <asm/dma.h>
 115 #include <linux/init.h>
 116 #include <linux/poll.h>
 117 #include <linux/spinlock.h>
 118 #include <linux/smp_lock.h>
 119 #include <asm/uaccess.h>
 120 #include <asm/hardirq.h>
 121
 122 #include"dm.h"
 123
 124 /* --------------------------------------------------------------------- */
 125
 126 #undef OSS_DOCUMENTED_MIXER_SEMANTICS
 127
 128 /* --------------------------------------------------------------------- */
 129
 130 #ifndef PCI_VENDOR_ID_CMEDIA
 131 #define PCI_VENDOR_ID_CMEDIA 0x13F6
 132 #endif
 133 #ifndef PCI_DEVICE_ID_CMEDIA_CM8338A
 134 #define PCI_DEVICE_ID_CMEDIA_CM8338A 0x0100
 135 #endif
 136 #ifndef PCI_DEVICE_ID_CMEDIA_CM8338B
 137 #define PCI_DEVICE_ID_CMEDIA_CM8338B 0x0101
 138 #endif
 139 #ifndef PCI_DEVICE_ID_CMEDIA_CM8738
 140 #define PCI_DEVICE_ID_CMEDIA_CM8738 0x0111
 141 #endif
 142
 143 #define CM_MAGIC ((PCI_VENDOR_ID_CMEDIA<<16)|PCI_DEVICE_ID_CMEDIA_CM8338A)
 144
 145 /*
 146  * CM8338 registers definition
 147  */
 148
 149 #define CODEC_CMI_FUNCTRL0 (0x00)
 150 #define CODEC_CMI_FUNCTRL1 (0x04)
 151 #define CODEC_CMI_CHFORMAT (0x08)
 152 #define CODEC_CMI_INT_HLDCLR (0x0C)
 153 #define CODEC_CMI_INT_STATUS (0x10)
 154 #define CODEC_CMI_LEGACY_CTRL (0x14)
 155 #define CODEC_CMI_MISC_CTRL (0x18)
 156 #define CODEC_CMI_TDMA_POS (0x1C)
 157 #define CODEC_CMI_MIXER (0x20)
 158 #define CODEC_SB16_DATA (0x22)
 159 #define CODEC_SB16_ADDR (0x23)
 160 #define CODEC_CMI_MIXER1 (0x24)
 161 #define CODEC_CMI_MIXER2 (0x25)
 162 #define CODEC_CMI_AUX_VOL (0x26)
 163 #define CODEC_CMI_MISC (0x27)
 164 #define CODEC_CMI_AC97 (0x28)
 165
 166 #define CODEC_CMI_CH0_FRAME1 (0x80)
 167 #define CODEC_CMI_CH0_FRAME2 (0x84)
 168 #define CODEC_CMI_CH1_FRAME1 (0x88)
 169 #define CODEC_CMI_CH1_FRAME2 (0x8C)
 170
 171 #define CODEC_CMI_EXT_REG (0xF0)
 172 #define UCHAR unsigned char
 173 /*
 174 ** Mixer registers for SB16
 175 */
 176
 177 #define DSP_MIX_DATARESETIDX ((UCHAR)(0x00))
 178
 179 #define DSP_MIX_MASTERVOLIDX_L ((UCHAR)(0x30))
 180 #define DSP_MIX_MASTERVOLIDX_R ((UCHAR)(0x31))
 181 #define DSP_MIX_VOICEVOLIDX_L ((UCHAR)(0x32))
 182 #define DSP_MIX_VOICEVOLIDX_R ((UCHAR)(0x33))
 183 #define DSP_MIX_FMVOLIDX_L ((UCHAR)(0x34))
 184 #define DSP_MIX_FMVOLIDX_R ((UCHAR)(0x35))
 185 #define DSP_MIX_CDVOLIDX_L ((UCHAR)(0x36))
 186 #define DSP_MIX_CDVOLIDX_R ((UCHAR)(0x37))
 187 #define DSP_MIX_LINEVOLIDX_L ((UCHAR)(0x38))
 188 #define DSP_MIX_LINEVOLIDX_R ((UCHAR)(0x39))
 189
 190 #define DSP_MIX_MICVOLIDX ((UCHAR)(0x3A))
 191 #define DSP_MIX_SPKRVOLIDX ((UCHAR)(0x3B))
 192
 193 #define DSP_MIX_OUTMIXIDX ((UCHAR)(0x3C))
 194
 195 #define DSP_MIX_ADCMIXIDX_L ((UCHAR)(0x3D))
 196 #define DSP_MIX_ADCMIXIDX_R ((UCHAR)(0x3E))
 197
 198 #define DSP_MIX_INGAINIDX_L ((UCHAR)(0x3F))
 199 #define DSP_MIX_INGAINIDX_R ((UCHAR)(0x40))
 200 #define DSP_MIX_OUTGAINIDX_L ((UCHAR)(0x41))
 201 #define DSP_MIX_OUTGAINIDX_R ((UCHAR)(0x42))
 202
 203 #define DSP_MIX_AGCIDX ((UCHAR)(0x43))
 204
 205 #define DSP_MIX_TREBLEIDX_L ((UCHAR)(0x44))
 206 #define DSP_MIX_TREBLEIDX_R ((UCHAR)(0x45))
 207 #define DSP_MIX_BASSIDX_L ((UCHAR)(0x46))
 208 #define DSP_MIX_BASSIDX_R ((UCHAR)(0x47))
 209 #define CM_CH0_RESET 0x04
 210 #define CM_CH1_RESET 0x08
 211 #define CM_EXTENT_CODEC 0x100
 212 #define CM_EXTENT_MIDI 0x2
 213 #define CM_EXTENT_SYNTH 0x4
 214 #define CM_INT_CH0 1
 215 #define CM_INT_CH1 2
 216
 217 #define CM_CFMT_STEREO 0x01
 218 #define CM_CFMT_16BIT 0x02
 219 #define CM_CFMT_MASK 0x03
 220 #define CM_CFMT_DACSHIFT 0
 221 #define CM_CFMT_ADCSHIFT 2
 222
 223 static const unsigned sample_size[] = {1,2,2,4};
 224 static const unsigned sample_shift[] = {0,1,1,2};
 225
 226 #define CM_CENABLE_RE 0x2
 227 #define CM_CENABLE_PE 0x1
 228
 229
 230 /* MIDI buffer sizes */
 231
 232 #define MIDIINBUF 256
 233 #define MIDIOUTBUF 256
 234
 235 #define FMODE_MIDI_SHIFT 2
 236 #define FMODE_MIDI_READ (FMODE_READ << FMODE_MIDI_SHIFT)
 237 #define FMODE_MIDI_WRITE (FMODE_WRITE << FMODE_MIDI_SHIFT)
 238
 239 #define FMODE_DMFM 0x10
 240
 241 /* --------------------------------------------------------------------- */
 242
 243 struct cm_state {
 244 /* magic */
 245 unsigned int magic;
 246
 247 /* we keep cm cards in a linked list */
 248 struct cm_state *next;
 249
 250 /* soundcore stuff */
 251 int dev_audio;
 252 int dev_mixer;
 253 int dev_midi;
 254 int dev_dmfm;
 255
 256 /* hardware resources */
 257 unsigned int iosb, iobase, iosynth, iomidi, iogame, irq;
 258
 259 /* mixer stuff */
 260 struct{
 261 unsigned int modcnt;
 262 #ifndef OSS_DOCUMENTED_MIXER_SEMANTICS
 263 unsigned short vol[13];
 264 #endif/* OSS_DOCUMENTED_MIXER_SEMANTICS */
 265 } mix;
 266
 267 /* wave stuff */
 268 unsigned int rateadc, ratedac;
 269 unsigned char fmt, enable;
 270
 271  spinlock_t lock;
 272 struct semaphore open_sem;
 273  mode_t open_mode;
 274  wait_queue_head_t open_wait;
 275
 276 struct dmabuf {
 277 void*rawbuf;
 278 unsigned buforder;
 279 unsigned numfrag;
 280 unsigned fragshift;
 281 unsigned hwptr, swptr;
 282 unsigned total_bytes;
 283 int count;
 284 unsigned error;/* over/underrun */
 285  wait_queue_head_t wait;
 286 /* redundant, but makes calculations easier */
 287 unsigned fragsize;
 288 unsigned dmasize;
 289 unsigned fragsamples;
 290 unsigned dmasamples;
 291 /* OSS stuff */
 292 unsigned mapped:1;
 293 unsigned ready:1;
 294 unsigned endcleared:1;
 295 unsigned ossfragshift;
 296 int ossmaxfrags;
 297 unsigned subdivision;
 298 } dma_dac, dma_adc;
 299
 300 /* midi stuff */
 301 struct{
 302 unsigned ird, iwr, icnt;
 303 unsigned ord, owr, ocnt;
 304  wait_queue_head_t iwait;
 305  wait_queue_head_t owait;
 306 struct timer_list timer;
 307 unsigned char ibuf[MIDIINBUF];
 308 unsigned char obuf[MIDIOUTBUF];
 309 } midi;
 310 };
 311
 312 /* --------------------------------------------------------------------- */
 313
 314 static struct cm_state *devs = NULL;
 315 static unsigned long wavetable_mem =0;
 316
 317 /* --------------------------------------------------------------------- */
 318
 319 extern __inline__ unsignedld2(unsigned int x)
 320 {
 321 unsigned r =0;
 322
 323 if(x >=0x10000) {
 324  x >>=16;
 325  r +=16;
 326 }
 327 if(x >=0x100) {
 328  x >>=8;
 329  r +=8;
 330 }
 331 if(x >=0x10) {
 332  x >>=4;
 333  r +=4;
 334 }
 335 if(x >=4) {
 336  x >>=2;
 337  r +=2;
 338 }
 339 if(x >=2)
 340  r++;
 341 return r;
 342 }
 343
 344 /*
 345  * hweightN: returns the hamming weight (i.e. the number
 346  * of bits set) of a N-bit word
 347  */
 348
 349 #ifdef hweight32
 350 #undef hweight32
 351 #endif
 352
 353 extern __inline__ unsigned inthweight32(unsigned int w)
 354 {
 355 unsigned int res = (w &0x55555555) + ((w >>1) &0x55555555);
 356  res = (res &0x33333333) + ((res >>2) &0x33333333);
 357  res = (res &0x0F0F0F0F) + ((res >>4) &0x0F0F0F0F);
 358  res = (res &0x00FF00FF) + ((res >>8) &0x00FF00FF);
 359 return(res &0x0000FFFF) + ((res >>16) &0x0000FFFF);
 360 }
 361
 362 /* --------------------------------------------------------------------- */
 363
 364 static voidset_dmadac(struct cm_state *s,unsigned int addr,unsigned int count)
 365 {
 366  count--;
 367 outl(addr, s->iobase + CODEC_CMI_CH0_FRAME1);
 368 outw(count, s->iobase + CODEC_CMI_CH0_FRAME2);
 369 outb(inb(s->iobase + CODEC_CMI_FUNCTRL0) & ~1, s->iobase + CODEC_CMI_FUNCTRL0);
 370 // outb(inb(s->iobase + CODEC_CMI_FUNCTRL0 + 2) | 1, s->iobase + CODEC_CMI_FUNCTRL0 + 2);
 371 }
 372
 373 static voidset_dmaadc(struct cm_state *s,unsigned int addr,unsigned int count)
 374 {
 375  count--;
 376 outl(addr, s->iobase + CODEC_CMI_CH1_FRAME1);
 377 outw(count, s->iobase + CODEC_CMI_CH1_FRAME2);
 378 outb(inb(s->iobase + CODEC_CMI_FUNCTRL0) |2, s->iobase + CODEC_CMI_FUNCTRL0);
 379 // outb(inb(s->iobase + CODEC_CMI_FUNCTRL0 + 2) | 2, s->iobase + CODEC_CMI_FUNCTRL0 + 2);
 380 }
 381
 382 extern __inline__ unsignedget_dmadac(struct cm_state *s)
 383 {
 384 unsigned int curr_addr;
 385
 386 if(!s->dma_dac.dmasize || !(s->enable & CM_CENABLE_PE))
 387 return0;
 388
 389  curr_addr =inl(s->iobase + CODEC_CMI_CH0_FRAME1);
 390  curr_addr -=virt_to_bus(s->dma_dac.rawbuf);
 391  curr_addr = s->dma_dac.dmasize - curr_addr;
 392  curr_addr &= ~(sample_size[(s->fmt >> CM_CFMT_DACSHIFT) & CM_CFMT_MASK]-1);
 393 return curr_addr;
 394 }
 395
 396 extern __inline__ unsignedget_dmaadc(struct cm_state *s)
 397 {
 398 unsigned int curr_addr;
 399
 400 if(!s->dma_adc.dmasize || !(s->enable & CM_CENABLE_RE))
 401 return0;
 402
 403  curr_addr =inl(s->iobase + CODEC_CMI_CH1_FRAME1);
 404  curr_addr -=virt_to_bus(s->dma_adc.rawbuf);
 405  curr_addr = s->dma_adc.dmasize - curr_addr;
 406  curr_addr &= ~(sample_size[(s->fmt >> CM_CFMT_ADCSHIFT) & CM_CFMT_MASK]-1);
 407 return curr_addr;
 408 }
 409
 410 static voidwrmixer(struct cm_state *s,unsigned char idx,unsigned char data)
 411 {
 412 outb(idx, s->iobase + CODEC_SB16_ADDR);
 413 udelay(10);
 414 outb(data, s->iobase + CODEC_SB16_DATA);
 415 udelay(10);
 416 }
 417
 418 static unsigned charrdmixer(struct cm_state *s,unsigned char idx)
 419 {
 420 unsigned char v;
 421
 422 outb(idx, s->iobase + CODEC_SB16_ADDR);
 423 udelay(10);
 424  v =inb(s->iobase + CODEC_SB16_DATA);
 425 udelay(10);
 426 return v;
 427 }
 428
 429 static voidset_fmt(struct cm_state *s,unsigned char mask,unsigned char data)
 430 {
 431 unsigned long flags;
 432
 433 spin_lock_irqsave(&s->lock, flags);
 434 if(mask) {
 435  s->fmt =inb(s->iobase + CODEC_CMI_CHFORMAT);
 436 udelay(10);
 437 }
 438  s->fmt = (s->fmt & mask) | data;
 439 outb(s->fmt, s->iobase + CODEC_CMI_CHFORMAT);
 440 spin_unlock_irqrestore(&s->lock, flags);
 441 udelay(10);
 442 }
 443
 444 static voidfrobindir(struct cm_state *s,unsigned char idx,unsigned char mask,unsigned char data)
 445 {
 446 outb(idx, s->iobase + CODEC_SB16_ADDR);
 447 udelay(10);
 448 outb((inb(s->iobase + CODEC_SB16_DATA) & mask) | data, s->iobase + CODEC_SB16_DATA);
 449 udelay(10);
 450 }
 451
 452 static struct{
 453 unsigned rate;
 454 unsigned lower;
 455 unsigned upper;
 456 unsigned char freq;
 457 } rate_lookup[] =
 458 {
 459 {5512, (0+5512) /2, (5512+8000) /2,0},
 460 {8000, (5512+8000) /2, (8000+11025) /2,4},
 461 {11025, (8000+11025) /2, (11025+16000) /2,1},
 462 {16000, (11025+16000) /2, (16000+22050) /2,5},
 463 {22050, (16000+22050) /2, (22050+32000) /2,2},
 464 {32000, (22050+32000) /2, (32000+44100) /2,6},
 465 {44100, (32000+44100) /2, (44100+48000) /2,3},
 466 {48000, (44100+48000) /2,48000,7}
 467 };
 468
 469 static voidset_dac_rate(struct cm_state *s,unsigned rate)
 470 {
 471 unsigned long flags;
 472 unsigned char freq =4, val;
 473 int i;
 474
 475 if(rate >48000)
 476  rate =48000;
 477 if(rate <5512)
 478  rate =5512;
 479 for(i =0; i <sizeof(rate_lookup) /sizeof(rate_lookup[0]); i++)
 480 {
 481 if(rate > rate_lookup[i].lower && rate <= rate_lookup[i].upper)
 482 {
 483  rate = rate_lookup[i].rate;
 484  freq = rate_lookup[i].freq;
 485 break;
 486 }
 487 }
 488  s->ratedac = rate;
 489  freq <<=2;
 490 spin_lock_irqsave(&s->lock, flags);
 491  val =inb(s->iobase + CODEC_CMI_FUNCTRL1 +1) & ~0x1c;
 492 outb(val | freq, s->iobase + CODEC_CMI_FUNCTRL1 +1);
 493 spin_unlock_irqrestore(&s->lock, flags);
 494 }
 495
 496 static voidset_adc_rate(struct cm_state *s,unsigned rate)
 497 {
 498 unsigned long flags;
 499 unsigned char freq =4, val;
 500 int i;
 501
 502 if(rate >48000)
 503  rate =48000;
 504 if(rate <5512)
 505  rate =5512;
 506 for(i =0; i <sizeof(rate_lookup) /sizeof(rate_lookup[0]); i++)
 507 {
 508 if(rate > rate_lookup[i].lower && rate <= rate_lookup[i].upper)
 509 {
 510  rate = rate_lookup[i].rate;
 511  freq = rate_lookup[i].freq;
 512 break;
 513 }
 514 }
 515  s->rateadc = rate;
 516  freq <<=5;
 517 spin_lock_irqsave(&s->lock, flags);
 518  val =inb(s->iobase + CODEC_CMI_FUNCTRL1 +1) & ~0xe0;
 519 outb(val | freq, s->iobase + CODEC_CMI_FUNCTRL1 +1);
 520 spin_unlock_irqrestore(&s->lock, flags);
 521 }
 522
 523 /* --------------------------------------------------------------------- */
 524
 525 extern inlinevoidstop_adc(struct cm_state *s)
 526 {
 527 unsigned long flags;
 528
 529 spin_lock_irqsave(&s->lock, flags);
 530 /* disable channel */
 531 outb(s->enable, s->iobase + CODEC_CMI_FUNCTRL0 +2);
 532  s->enable &= ~CM_CENABLE_RE;
 533 /* disable interrupt */
 534 outb(inb(s->iobase + CODEC_CMI_INT_HLDCLR +2) & ~2, s->iobase + CODEC_CMI_INT_HLDCLR +2);
 535 /* reset */
 536 outb(s->enable | CM_CH1_RESET, s->iobase + CODEC_CMI_FUNCTRL0 +2);
 537 udelay(10);
 538 outb(s->enable & ~CM_CH1_RESET, s->iobase + CODEC_CMI_FUNCTRL0 +2);
 539 spin_unlock_irqrestore(&s->lock, flags);
 540 }
 541
 542 extern inlinevoidstop_dac(struct cm_state *s)
 543 {
 544 unsigned long flags;
 545
 546 spin_lock_irqsave(&s->lock, flags);
 547 /* disable channel */
 548  s->enable &= ~CM_CENABLE_PE;
 549 outb(s->enable, s->iobase + CODEC_CMI_FUNCTRL0 +2);
 550 /* disable interrupt */
 551 outb(inb(s->iobase + CODEC_CMI_INT_HLDCLR +2) & ~1, s->iobase + CODEC_CMI_INT_HLDCLR +2);
 552 /* reset */
 553 outb(s->enable | CM_CH0_RESET, s->iobase + CODEC_CMI_FUNCTRL0 +2);
 554 udelay(10);
 555 outb(s->enable & ~CM_CH0_RESET, s->iobase + CODEC_CMI_FUNCTRL0 +2);
 556 spin_unlock_irqrestore(&s->lock, flags);
 557 }
 558
 559 static voidstart_dac(struct cm_state *s)
 560 {
 561 unsigned long flags;
 562
 563 spin_lock_irqsave(&s->lock, flags);
 564 if((s->dma_dac.mapped || s->dma_dac.count >0) && s->dma_dac.ready) {
 565 outb(inb(s->iobase + CODEC_CMI_INT_HLDCLR +2) |1, s->iobase + CODEC_CMI_INT_HLDCLR +2);
 566  s->enable |= CM_CENABLE_PE;
 567 outb(s->enable, s->iobase + CODEC_CMI_FUNCTRL0 +2);
 568 }
 569 spin_unlock_irqrestore(&s->lock, flags);
 570 }
 571
 572 static voidstart_adc(struct cm_state *s)
 573 {
 574 unsigned long flags;
 575
 576 spin_lock_irqsave(&s->lock, flags);
 577 if((s->dma_adc.mapped || s->dma_adc.count < (signed)(s->dma_adc.dmasize -2*s->dma_adc.fragsize))
 578 && s->dma_adc.ready) {
 579 outb(inb(s->iobase + CODEC_CMI_INT_HLDCLR +2) |2, s->iobase + CODEC_CMI_INT_HLDCLR +2);
 580  s->enable |= CM_CENABLE_RE;
 581 outb(s->enable, s->iobase + CODEC_CMI_FUNCTRL0 +2);
 582 }
 583 spin_unlock_irqrestore(&s->lock, flags);
 584 }
 585
 586 /* --------------------------------------------------------------------- */
 587
 588 #define DMABUF_DEFAULTORDER (16-PAGE_SHIFT)
 589 #define DMABUF_MINORDER 1
 590
 591 static voiddealloc_dmabuf(struct dmabuf *db)
 592 {
 593 struct page *pstart, *pend;
 594
 595 if(db->rawbuf) {
 596 /* undo marking the pages as reserved */
 597  pend =virt_to_page(db->rawbuf + (PAGE_SIZE << db->buforder) -1);
 598 for(pstart =virt_to_page(db->rawbuf); pstart <= pend; pstart++)
 599 mem_map_unreserve(pstart);
 600 free_pages((unsigned long)db->rawbuf, db->buforder);
 601 }
 602  db->rawbuf = NULL;
 603  db->mapped = db->ready =0;
 604 }
 605
 606
 607 /* Ch0 is used for playback, Ch1 is used for recording */
 608
 609 static intprog_dmabuf(struct cm_state *s,unsigned rec)
 610 {
 611 struct dmabuf *db = rec ? &s->dma_adc : &s->dma_dac;
 612 unsigned rate = rec ? s->rateadc : s->ratedac;
 613 int order;
 614 unsigned bytepersec;
 615 unsigned bufs;
 616 struct page *pstart, *pend;
 617 unsigned char fmt;
 618 unsigned long flags;
 619
 620 spin_lock_irqsave(&s->lock, flags);
 621  fmt = s->fmt;
 622 if(rec) {
 623  s->enable &= ~CM_CENABLE_RE;
 624  fmt >>= CM_CFMT_ADCSHIFT;
 625 }else{
 626  s->enable &= ~CM_CENABLE_PE;
 627  fmt >>= CM_CFMT_DACSHIFT;
 628 }
 629 outb(s->enable, s->iobase + CODEC_CMI_FUNCTRL0 +2);
 630 spin_unlock_irqrestore(&s->lock, flags);
 631  fmt &= CM_CFMT_MASK;
 632  db->hwptr = db->swptr = db->total_bytes = db->count = db->error = db->endcleared =0;
 633 if(!db->rawbuf) {
 634  db->ready = db->mapped =0;
 635 for(order = DMABUF_DEFAULTORDER; order >= DMABUF_MINORDER; order--)
 636 if((db->rawbuf = (void*)__get_free_pages(GFP_KERNEL | GFP_DMA, order)))
 637 break;
 638 if(!db->rawbuf)
 639 return-ENOMEM;
 640  db->buforder = order;
 641 if((virt_to_bus(db->rawbuf) ^ (virt_to_bus(db->rawbuf) + (PAGE_SIZE << db->buforder) -1)) & ~0xffff)
 642 printk(KERN_DEBUG "cmpci: DMA buffer crosses 64k boundary: busaddr 0x%lx size %ld\n",
 643 virt_to_bus(db->rawbuf), PAGE_SIZE << db->buforder);
 644 if((virt_to_bus(db->rawbuf) + (PAGE_SIZE << db->buforder) -1) & ~0xffffff)
 645 printk(KERN_DEBUG "cmpci: DMA buffer beyond 16MB: busaddr 0x%lx size %ld\n",
 646 virt_to_bus(db->rawbuf), PAGE_SIZE << db->buforder);
 647 /* now mark the pages as reserved; otherwise remap_page_range doesn't do what we want */
 648  pend =virt_to_page(db->rawbuf + (PAGE_SIZE << db->buforder) -1);
 649 for(pstart =virt_to_page(db->rawbuf); pstart <= pend; pstart++)
 650 mem_map_reserve(pstart);
 651 }
 652  bytepersec = rate << sample_shift[fmt];
 653  bufs = PAGE_SIZE << db->buforder;
 654 if(db->ossfragshift) {
 655 if((1000<< db->ossfragshift) < bytepersec)
 656  db->fragshift =ld2(bytepersec/1000);
 657 else
 658  db->fragshift = db->ossfragshift;
 659 }else{
 660  db->fragshift =ld2(bytepersec/100/(db->subdivision ? db->subdivision :1));
 661 if(db->fragshift <3)
 662  db->fragshift =3;
 663 }
 664  db->numfrag = bufs >> db->fragshift;
 665 while(db->numfrag <4&& db->fragshift >3) {
 666  db->fragshift--;
 667  db->numfrag = bufs >> db->fragshift;
 668 }
 669  db->fragsize =1<< db->fragshift;
 670 if(db->ossmaxfrags >=4&& db->ossmaxfrags < db->numfrag)
 671  db->numfrag = db->ossmaxfrags;
 672 /* to make fragsize >= 4096 */
 673 #if 0
 674 if(s->modem)
 675 {
 676 while(db->fragsize <4096&& db->numfrag >=4)
 677 {
 678  db->fragsize *=2;
 679  db->fragshift++;
 680  db->numfrag /=2;
 681 }
 682 }
 683 #endif
 684  db->fragsamples = db->fragsize >> sample_shift[fmt];
 685  db->dmasize = db->numfrag << db->fragshift;
 686  db->dmasamples = db->dmasize >> sample_shift[fmt];
 687 memset(db->rawbuf, (fmt & CM_CFMT_16BIT) ?0:0x80, db->dmasize);
 688 spin_lock_irqsave(&s->lock, flags);
 689 if(rec) {
 690 set_dmaadc(s,virt_to_bus(db->rawbuf), db->dmasize >> sample_shift[fmt]);
 691 /* program sample counts */
 692 outw(db->fragsamples-1, s->iobase + CODEC_CMI_CH1_FRAME2 +2);
 693 }else{
 694 set_dmadac(s,virt_to_bus(db->rawbuf), db->dmasize >> sample_shift[fmt]);
 695 /* program sample counts */
 696 outw(db->fragsamples-1, s->iobase + CODEC_CMI_CH0_FRAME2 +2);
 697 }
 698 spin_unlock_irqrestore(&s->lock, flags);
 699  db->ready =1;
 700 return0;
 701 }
 702
 703 extern __inline__ voidclear_advance(struct cm_state *s)
 704 {
 705 unsigned char c = (s->fmt & (CM_CFMT_16BIT << CM_CFMT_DACSHIFT)) ?0:0x80;
 706 unsigned char*buf = s->dma_dac.rawbuf;
 707 unsigned bsize = s->dma_dac.dmasize;
 708 unsigned bptr = s->dma_dac.swptr;
 709 unsigned len = s->dma_dac.fragsize;
 710
 711 if(bptr + len > bsize) {
 712 unsigned x = bsize - bptr;
 713 memset(buf + bptr, c, x);
 714  bptr =0;
 715  len -= x;
 716 }
 717 memset(buf + bptr, c, len);
 718 outb(s->enable, s->iobase + CODEC_CMI_FUNCTRL0 +2);
 719 }
 720
 721 /* call with spinlock held! */
 722 static voidcm_update_ptr(struct cm_state *s)
 723 {
 724 unsigned hwptr;
 725 int diff;
 726
 727 /* update ADC pointer */
 728 if(s->dma_adc.ready) {
 729  hwptr = (s->dma_adc.dmasize -get_dmaadc(s)) % s->dma_adc.dmasize;
 730  diff = (s->dma_adc.dmasize + hwptr - s->dma_adc.hwptr) % s->dma_adc.dmasize;
 731  s->dma_adc.hwptr = hwptr;
 732  s->dma_adc.total_bytes += diff;
 733  s->dma_adc.count += diff;
 734 if(s->dma_adc.count >= (signed)s->dma_adc.fragsize)
 735 wake_up(&s->dma_adc.wait);
 736 if(!s->dma_adc.mapped) {
 737 if(s->dma_adc.count > (signed)(s->dma_adc.dmasize - ((3* s->dma_adc.fragsize) >>1))) {
 738  s->enable &= ~CM_CENABLE_RE;
 739 outb(s->enable, s->iobase + CODEC_CMI_FUNCTRL0 +2);
 740  s->dma_adc.error++;
 741 }
 742 }
 743 }
 744 /* update DAC pointer */
 745 if(s->dma_dac.ready) {
 746  hwptr = (s->dma_dac.dmasize -get_dmadac(s)) % s->dma_dac.dmasize;
 747  diff = (s->dma_dac.dmasize + hwptr - s->dma_dac.hwptr) % s->dma_dac.dmasize;
 748  s->dma_dac.hwptr = hwptr;
 749  s->dma_dac.total_bytes += diff;
 750 if(s->dma_dac.mapped) {
 751  s->dma_dac.count += diff;
 752 if(s->dma_dac.count >= (signed)s->dma_dac.fragsize)
 753 wake_up(&s->dma_dac.wait);
 754 }else{
 755  s->dma_dac.count -= diff;
 756 if(s->dma_dac.count <=0) {
 757  s->enable &= ~CM_CENABLE_PE;
 758 outb(s->enable, s->iobase + CODEC_CMI_FUNCTRL0 +2);
 759  s->dma_dac.error++;
 760 }else if(s->dma_dac.count <= (signed)s->dma_dac.fragsize && !s->dma_dac.endcleared) {
 761 clear_advance(s);
 762  s->dma_dac.endcleared =1;
 763 }
 764 if(s->dma_dac.count + (signed)s->dma_dac.fragsize <= (signed)s->dma_dac.dmasize)
 765 wake_up(&s->dma_dac.wait);
 766 }
 767 }
 768 }
 769
 770 /* hold spinlock for the following! */
 771 static voidcm_handle_midi(struct cm_state *s)
 772 {
 773 unsigned char ch;
 774 int wake;
 775
 776  wake =0;
 777 while(!(inb(s->iomidi+1) &0x80)) {
 778  ch =inb(s->iomidi);
 779 if(s->midi.icnt < MIDIINBUF) {
 780  s->midi.ibuf[s->midi.iwr] = ch;
 781  s->midi.iwr = (s->midi.iwr +1) % MIDIINBUF;
 782  s->midi.icnt++;
 783 }
 784  wake =1;
 785 }
 786 if(wake)
 787 wake_up(&s->midi.iwait);
 788  wake =0;
 789 while(!(inb(s->iomidi+1) &0x40) && s->midi.ocnt >0) {
 790 outb(s->midi.obuf[s->midi.ord], s->iomidi);
 791  s->midi.ord = (s->midi.ord +1) % MIDIOUTBUF;
 792  s->midi.ocnt--;
 793 if(s->midi.ocnt < MIDIOUTBUF-16)
 794  wake =1;
 795 }
 796 if(wake)
 797 wake_up(&s->midi.owait);
 798 }
 799
 800 static voidcm_interrupt(int irq,void*dev_id,struct pt_regs *regs)
 801 {
 802 struct cm_state *s = (struct cm_state *)dev_id;
 803 unsigned int intsrc, intstat;
 804
 805 /* fastpath out, to ease interrupt sharing */
 806  intsrc =inl(s->iobase + CODEC_CMI_INT_STATUS);
 807 if(!(intsrc &0x80000000))
 808 return;
 809 spin_lock(&s->lock);
 810  intstat =inb(s->iobase + CODEC_CMI_INT_HLDCLR +2);
 811 /* acknowledge interrupt */
 812 if(intsrc & CM_INT_CH0)
 813 {
 814 outb(intstat & ~1, s->iobase + CODEC_CMI_INT_HLDCLR +2);
 815 udelay(10);
 816 outb(intstat |1, s->iobase + CODEC_CMI_INT_HLDCLR +2);
 817 }
 818 if(intsrc & CM_INT_CH1)
 819 {
 820 outb(intstat & ~2, s->iobase + CODEC_CMI_INT_HLDCLR +2);
 821 udelay(10);
 822 outb(intstat |2, s->iobase + CODEC_CMI_INT_HLDCLR +2);
 823 }
 824 cm_update_ptr(s);
 825 cm_handle_midi(s);
 826 spin_unlock(&s->lock);
 827 }
 828
 829 static voidcm_midi_timer(unsigned long data)
 830 {
 831 struct cm_state *s = (struct cm_state *)data;
 832 unsigned long flags;
 833
 834 spin_lock_irqsave(&s->lock, flags);
 835 cm_handle_midi(s);
 836 spin_unlock_irqrestore(&s->lock, flags);
 837  s->midi.timer.expires = jiffies+1;
 838 add_timer(&s->midi.timer);
 839 }
 840
 841 /* --------------------------------------------------------------------- */
 842
 843 static const char invalid_magic[] = KERN_CRIT "cmpci: invalid magic value\n";
 844
 845 #ifdef CONFIG_SOUND_CMPCI/* support multiple chips */
 846 #define VALIDATE_STATE(s)
 847 #else
 848 #define VALIDATE_STATE(s) \
 849 ({ \
 850  if (!(s) || (s)->magic != CM_MAGIC) { \
 851  printk(invalid_magic); \
 852  return -ENXIO; \
 853  } \
 854 })
 855 #endif
 856
 857 /* --------------------------------------------------------------------- */
 858
 859 #define MT_4 1
 860 #define MT_5MUTE 2
 861 #define MT_4MUTEMONO 3
 862 #define MT_6MUTE 4
 863 #define MT_5MUTEMONO 5
 864
 865 static const struct{
 866 unsigned left;
 867 unsigned right;
 868 unsigned type;
 869 unsigned rec;
 870 unsigned play;
 871 } mixtable[SOUND_MIXER_NRDEVICES] = {
 872 [SOUND_MIXER_CD] = { DSP_MIX_CDVOLIDX_L, DSP_MIX_CDVOLIDX_R, MT_5MUTE,0x04,0x02},
 873 [SOUND_MIXER_LINE] = { DSP_MIX_LINEVOLIDX_L, DSP_MIX_LINEVOLIDX_R, MT_5MUTE,0x10,0x08},
 874 [SOUND_MIXER_MIC] = { DSP_MIX_MICVOLIDX, DSP_MIX_MICVOLIDX, MT_5MUTEMONO,0x01,0x01},
 875 [SOUND_MIXER_SYNTH] = { DSP_MIX_FMVOLIDX_L, DSP_MIX_FMVOLIDX_R, MT_5MUTE,0x40,0x00},
 876 [SOUND_MIXER_VOLUME] = { DSP_MIX_MASTERVOLIDX_L, DSP_MIX_MASTERVOLIDX_R, MT_5MUTE,0x00,0x00},
 877 [SOUND_MIXER_PCM] = { DSP_MIX_VOICEVOLIDX_L, DSP_MIX_VOICEVOLIDX_R, MT_5MUTE,0x00,0x00}
 878 };
 879
 880 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
 881
 882 static intreturn_mixval(struct cm_state *s,unsigned i,int*arg)
 883 {
 884 unsigned long flags;
 885 unsigned char l, r, rl, rr;
 886
 887 spin_lock_irqsave(&s->lock, flags);
 888  l =rdmixer(s, mixtable[i].left);
 889  r =rdmixer(s, mixtable[i].right);
 890 spin_unlock_irqrestore(&s->lock, flags);
 891 switch(mixtable[i].type) {
 892 case MT_4:
 893  r &=0xf;
 894  l &=0xf;
 895  rl =10+6* (l &15);
 896  rr =10+6* (r &15);
 897 break;
 898
 899 case MT_4MUTEMONO:
 900  rl =55-3* (l &15);
 901 if(r &0x10)
 902  rl +=45;
 903  rr = rl;
 904  r = l;
 905 break;
 906
 907 case MT_5MUTEMONO:
 908  r = l;
 909  rl =100-3* ((l >>3) &31);
 910  rr = rl;
 911 break;
 912
 913 case MT_5MUTE:
 914 default:
 915  rl =100-3* ((l >>3) &31);
 916  rr =100-3* ((r >>3) &31);
 917 break;
 918
 919 case MT_6MUTE:
 920  rl =100-3* (l &63) /2;
 921  rr =100-3* (r &63) /2;
 922 break;
 923 }
 924 if(l &0x80)
 925  rl =0;
 926 if(r &0x80)
 927  rr =0;
 928 returnput_user((rr <<8) | rl, arg);
 929 }
 930
 931 #else/* OSS_DOCUMENTED_MIXER_SEMANTICS */
 932
 933 static const unsigned char volidx[SOUND_MIXER_NRDEVICES] =
 934 {
 935 [SOUND_MIXER_CD] =1,
 936 [SOUND_MIXER_LINE] =2,
 937 [SOUND_MIXER_MIC] =3,
 938 [SOUND_MIXER_SYNTH] =4,
 939 [SOUND_MIXER_VOLUME] =5,
 940 [SOUND_MIXER_PCM] =6
 941 };
 942
 943 #endif/* OSS_DOCUMENTED_MIXER_SEMANTICS */
 944
 945 static unsignedmixer_recmask(struct cm_state *s)
 946 {
 947 unsigned long flags;
 948 int i, j, k;
 949
 950 spin_lock_irqsave(&s->lock, flags);
 951  j =rdmixer(s, DSP_MIX_ADCMIXIDX_L);
 952 spin_unlock_irqrestore(&s->lock, flags);
 953  j &=0x7f;
 954 for(k = i =0; i < SOUND_MIXER_NRDEVICES; i++)
 955 if(j & mixtable[i].rec)
 956  k |=1<< i;
 957 return k;
 958 }
 959
 960 static intmixer_ioctl(struct cm_state *s,unsigned int cmd,unsigned long arg)
 961 {
 962 unsigned long flags;
 963 int i, val, j;
 964 unsigned char l, r, rl, rr;
 965
 966 VALIDATE_STATE(s);
 967 if(cmd == SOUND_MIXER_INFO) {
 968  mixer_info info;
 969 strncpy(info.id,"cmpci",sizeof(info.id));
 970 strncpy(info.name,"C-Media PCI",sizeof(info.name));
 971  info.modify_counter = s->mix.modcnt;
 972 if(copy_to_user((void*)arg, &info,sizeof(info)))
 973 return-EFAULT;
 974 return0;
 975 }
 976 if(cmd == SOUND_OLD_MIXER_INFO) {
 977  _old_mixer_info info;
 978 strncpy(info.id,"cmpci",sizeof(info.id));
 979 strncpy(info.name,"C-Media cmpci",sizeof(info.name));
 980 if(copy_to_user((void*)arg, &info,sizeof(info)))
 981 return-EFAULT;
 982 return0;
 983 }
 984 if(cmd == OSS_GETVERSION)
 985 returnput_user(SOUND_VERSION, (int*)arg);
 986 if(_IOC_TYPE(cmd) !='M'||_SIOC_SIZE(cmd) !=sizeof(int))
 987 return-EINVAL;
 988 if(_SIOC_DIR(cmd) == _SIOC_READ) {
 989 switch(_IOC_NR(cmd)) {
 990 case SOUND_MIXER_RECSRC:/* Arg contains a bit for each recording source */
 991 returnput_user(mixer_recmask(s), (int*)arg);
 992
 993 case SOUND_MIXER_OUTSRC:/* Arg contains a bit for each recording source */
 994 returnput_user(mixer_recmask(s), (int*)arg);//need fix
 995
 996 case SOUND_MIXER_DEVMASK:/* Arg contains a bit for each supported device */
 997 for(val = i =0; i < SOUND_MIXER_NRDEVICES; i++)
 998 if(mixtable[i].type)
 999  val |=1<< i;
1000 returnput_user(val, (int*)arg);
1001
1002 case SOUND_MIXER_RECMASK:/* Arg contains a bit for each supported recording source */
1003 for(val = i =0; i < SOUND_MIXER_NRDEVICES; i++)
1004 if(mixtable[i].rec)
1005  val |=1<< i;
1006 returnput_user(val, (int*)arg);
1007
1008 case SOUND_MIXER_OUTMASK:/* Arg contains a bit for each supported recording source */
1009 for(val = i =0; i < SOUND_MIXER_NRDEVICES; i++)
1010 if(mixtable[i].play)
1011  val |=1<< i;
1012 returnput_user(val, (int*)arg);
1013
1014 case SOUND_MIXER_STEREODEVS:/* Mixer channels supporting stereo */
1015 for(val = i =0; i < SOUND_MIXER_NRDEVICES; i++)
1016 if(mixtable[i].type && mixtable[i].type != MT_4MUTEMONO)
1017  val |=1<< i;
1018 returnput_user(val, (int*)arg);
1019
1020 case SOUND_MIXER_CAPS:
1021 returnput_user(0, (int*)arg);
1022
1023 default:
1024  i =_IOC_NR(cmd);
1025 if(i >= SOUND_MIXER_NRDEVICES || !mixtable[i].type)
1026 return-EINVAL;
1027 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
1028 returnreturn_mixval(s, i, (int*)arg);
1029 #else/* OSS_DOCUMENTED_MIXER_SEMANTICS */
1030 if(!volidx[i])
1031 return-EINVAL;
1032 returnput_user(s->mix.vol[volidx[i]-1], (int*)arg);
1033 #endif/* OSS_DOCUMENTED_MIXER_SEMANTICS */
1034 }
1035 }
1036 if(_SIOC_DIR(cmd) != (_SIOC_READ|_SIOC_WRITE))
1037 return-EINVAL;
1038  s->mix.modcnt++;
1039 switch(_IOC_NR(cmd)) {
1040 case SOUND_MIXER_RECSRC:/* Arg contains a bit for each recording source */
1041 if(get_user(val, (int*)arg))
1042 return-EFAULT;
1043  i =hweight32(val);
1044 for(j = i =0; i < SOUND_MIXER_NRDEVICES; i++) {
1045 if(!(val & (1<< i)))
1046 continue;
1047 if(!mixtable[i].rec) {
1048  val &= ~(1<< i);
1049 continue;
1050 }
1051  j |= mixtable[i].rec;
1052 }
1053 spin_lock_irqsave(&s->lock, flags);
1054 wrmixer(s, DSP_MIX_ADCMIXIDX_L, j);
1055 wrmixer(s, DSP_MIX_ADCMIXIDX_R, (j &1) | (j>>1));
1056 spin_unlock_irqrestore(&s->lock, flags);
1057 return0;
1058
1059 case SOUND_MIXER_OUTSRC:/* Arg contains a bit for each recording source */
1060 if(get_user(val, (int*)arg))
1061 return-EFAULT;
1062 for(j = i =0; i < SOUND_MIXER_NRDEVICES; i++) {
1063 if(!(val & (1<< i)))
1064 continue;
1065 if(!mixtable[i].play) {
1066  val &= ~(1<< i);
1067 continue;
1068 }
1069  j |= mixtable[i].play;
1070 }
1071 spin_lock_irqsave(&s->lock, flags);
1072 frobindir(s, DSP_MIX_OUTMIXIDX,0x1f, j);
1073 spin_unlock_irqrestore(&s->lock, flags);
1074 return0;
1075
1076 default:
1077  i =_IOC_NR(cmd);
1078 if(i >= SOUND_MIXER_NRDEVICES || !mixtable[i].type)
1079 return-EINVAL;
1080 if(get_user(val, (int*)arg))
1081 return-EFAULT;
1082  l = val &0xff;
1083  r = (val >>8) &0xff;
1084 if(l >100)
1085  l =100;
1086 if(r >100)
1087  r =100;
1088 spin_lock_irqsave(&s->lock, flags);
1089 switch(mixtable[i].type) {
1090 case MT_4:
1091 if(l >=10)
1092  l -=10;
1093 if(r >=10)
1094  r -=10;
1095 frobindir(s, mixtable[i].left,0xf0, l /6);
1096 frobindir(s, mixtable[i].right,0xf0, l /6);
1097 break;
1098
1099 case MT_4MUTEMONO:
1100  rl = (l <4?0: (l -5) /3) &31;
1101  rr = (rl >>2) &7;
1102 wrmixer(s, mixtable[i].left, rl<<3);
1103 outb((inb(s->iobase + CODEC_CMI_MIXER2) & ~0x0e) | rr<<1, s->iobase + CODEC_CMI_MIXER2);
1104 break;
1105
1106 case MT_5MUTEMONO:
1107  r = l;
1108  rl = l <4?0: (l -5) /3;
1109  rr = rl >>2;
1110 wrmixer(s, mixtable[i].left, rl<<3);
1111 outb((inb(s->iobase + CODEC_CMI_MIXER2) & ~0x0e) | rr<<1, s->iobase + CODEC_CMI_MIXER2);
1112 break;
1113
1114 case MT_5MUTE:
1115  rl = l <4?0: (l -5) /3;
1116  rr = r <4?0: (r -5) /3;
1117 wrmixer(s, mixtable[i].left, rl<<3);
1118 wrmixer(s, mixtable[i].right, rr<<3);
1119 break;
1120
1121 case MT_6MUTE:
1122 if(l <6)
1123  rl =0x00;
1124 else
1125  rl = l *2/3;
1126 if(r <6)
1127  rr =0x00;
1128 else
1129  rr = r *2/3;
1130 wrmixer(s, mixtable[i].left, rl);
1131 wrmixer(s, mixtable[i].right, rr);
1132 break;
1133 }
1134 spin_unlock_irqrestore(&s->lock, flags);
1135 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
1136 returnreturn_mixval(s, i, (int*)arg);
1137 #else/* OSS_DOCUMENTED_MIXER_SEMANTICS */
1138 if(!volidx[i])
1139 return-EINVAL;
1140  s->mix.vol[volidx[i]-1] = val;
1141 returnput_user(s->mix.vol[volidx[i]-1], (int*)arg);
1142 #endif/* OSS_DOCUMENTED_MIXER_SEMANTICS */
1143 }
1144 }
1145
1146 /* --------------------------------------------------------------------- */
1147
1148 static loff_t cm_llseek(struct file *file, loff_t offset,int origin)
1149 {
1150 return-ESPIPE;
1151 }
1152
1153 /* --------------------------------------------------------------------- */
1154
1155 static intcm_open_mixdev(struct inode *inode,struct file *file)
1156 {
1157 int minor =MINOR(inode->i_rdev);
1158 struct cm_state *s = devs;
1159
1160 while(s && s->dev_mixer != minor)
1161  s = s->next;
1162 if(!s)
1163 return-ENODEV;
1164 VALIDATE_STATE(s);
1165  file->private_data = s;
1166 return0;
1167 }
1168
1169 static intcm_release_mixdev(struct inode *inode,struct file *file)
1170 {
1171 struct cm_state *s = (struct cm_state *)file->private_data;
1172
1173 VALIDATE_STATE(s);
1174 return0;
1175 }
1176
1177 static intcm_ioctl_mixdev(struct inode *inode,struct file *file,unsigned int cmd,unsigned long arg)
1178 {
1179 returnmixer_ioctl((struct cm_state *)file->private_data, cmd, arg);
1180 }
1181
1182 static/*const*/struct file_operations cm_mixer_fops = {
1183  owner: THIS_MODULE,
1184  llseek: cm_llseek,
1185  ioctl: cm_ioctl_mixdev,
1186  open: cm_open_mixdev,
1187  release: cm_release_mixdev,
1188 };
1189
1190 /* --------------------------------------------------------------------- */
1191
1192 static intdrain_dac(struct cm_state *s,int nonblock)
1193 {
1194 DECLARE_WAITQUEUE(wait, current);
1195 unsigned long flags;
1196 int count, tmo;
1197
1198 if(s->dma_dac.mapped || !s->dma_dac.ready)
1199 return0;
1200 add_wait_queue(&s->dma_dac.wait, &wait);
1201 for(;;) {
1202 set_current_state(TASK_INTERRUPTIBLE);
1203 spin_lock_irqsave(&s->lock, flags);
1204  count = s->dma_dac.count;
1205 spin_unlock_irqrestore(&s->lock, flags);
1206 if(count <=0)
1207 break;
1208 if(signal_pending(current))
1209 break;
1210 if(nonblock) {
1211 remove_wait_queue(&s->dma_dac.wait, &wait);
1212  current->state = TASK_RUNNING;
1213 return-EBUSY;
1214 }
1215  tmo = (count * HZ) / s->ratedac;
1216  tmo >>= sample_shift[(s->fmt >> CM_CFMT_DACSHIFT) & CM_CFMT_MASK];
1217 if(!schedule_timeout(tmo ? :1) && tmo)
1218 printk(KERN_DEBUG "cmpci: dma timed out??\n");
1219 }
1220 remove_wait_queue(&s->dma_dac.wait, &wait);
1221  current->state = TASK_RUNNING;
1222 if(signal_pending(current))
1223 return-ERESTARTSYS;
1224 return0;
1225 }
1226
1227 /* --------------------------------------------------------------------- */
1228
1229 static ssize_t cm_read(struct file *file,char*buffer,size_t count, loff_t *ppos)
1230 {
1231 struct cm_state *s = (struct cm_state *)file->private_data;
1232  ssize_t ret;
1233 unsigned long flags;
1234 unsigned swptr;
1235 int cnt;
1236
1237 VALIDATE_STATE(s);
1238 if(ppos != &file->f_pos)
1239 return-ESPIPE;
1240 if(s->dma_adc.mapped)
1241 return-ENXIO;
1242 if(!s->dma_adc.ready && (ret =prog_dmabuf(s,1)))
1243 return ret;
1244 if(!access_ok(VERIFY_WRITE, buffer, count))
1245 return-EFAULT;
1246  ret =0;
1247 #if 0
1248 spin_lock_irqsave(&s->lock, flags);
1249 cm_update_ptr(s);
1250 spin_unlock_irqrestore(&s->lock, flags);
1251 #endif
1252 while(count >0) {
1253 spin_lock_irqsave(&s->lock, flags);
1254  swptr = s->dma_adc.swptr;
1255  cnt = s->dma_adc.dmasize-swptr;
1256 if(s->dma_adc.count < cnt)
1257  cnt = s->dma_adc.count;
1258 spin_unlock_irqrestore(&s->lock, flags);
1259 if(cnt > count)
1260  cnt = count;
1261 if(cnt <=0) {
1262 start_adc(s);
1263 if(file->f_flags & O_NONBLOCK)
1264 return ret ? ret : -EAGAIN;
1265 if(!interruptible_sleep_on_timeout(&s->dma_adc.wait, HZ)) {
1266 printk(KERN_DEBUG "cmpci: read: chip lockup? dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
1267  s->dma_adc.dmasize, s->dma_adc.fragsize, s->dma_adc.count,
1268  s->dma_adc.hwptr, s->dma_adc.swptr);
1269 stop_adc(s);
1270 spin_lock_irqsave(&s->lock, flags);
1271 set_dmaadc(s,virt_to_bus(s->dma_adc.rawbuf), s->dma_adc.dmasamples);
1272 /* program sample counts */
1273 outw(s->dma_adc.fragsamples-1, s->iobase + CODEC_CMI_CH1_FRAME2 +2);
1274  s->dma_adc.count = s->dma_adc.hwptr = s->dma_adc.swptr =0;
1275 spin_unlock_irqrestore(&s->lock, flags);
1276 }
1277 if(signal_pending(current))
1278 return ret ? ret : -ERESTARTSYS;
1279 continue;
1280 }
1281 if(copy_to_user(buffer, s->dma_adc.rawbuf + swptr, cnt))
1282 return ret ? ret : -EFAULT;
1283  swptr = (swptr + cnt) % s->dma_adc.dmasize;
1284 spin_lock_irqsave(&s->lock, flags);
1285  s->dma_adc.swptr = swptr;
1286  s->dma_adc.count -= cnt;
1287 spin_unlock_irqrestore(&s->lock, flags);
1288  count -= cnt;
1289  buffer += cnt;
1290  ret += cnt;
1291 start_adc(s);
1292 }
1293 return ret;
1294 }
1295
1296 static ssize_t cm_write(struct file *file,const char*buffer,size_t count, loff_t *ppos)
1297 {
1298 struct cm_state *s = (struct cm_state *)file->private_data;
1299  ssize_t ret;
1300 unsigned long flags;
1301 unsigned swptr;
1302 int cnt;
1303
1304 VALIDATE_STATE(s);
1305 if(ppos != &file->f_pos)
1306 return-ESPIPE;
1307 if(s->dma_dac.mapped)
1308 return-ENXIO;
1309 if(!s->dma_dac.ready && (ret =prog_dmabuf(s,0)))
1310 return ret;
1311 if(!access_ok(VERIFY_READ, buffer, count))
1312 return-EFAULT;
1313  ret =0;
1314 #if 0
1315 spin_lock_irqsave(&s->lock, flags);
1316 cm_update_ptr(s);
1317 spin_unlock_irqrestore(&s->lock, flags);
1318 #endif
1319 while(count >0) {
1320 spin_lock_irqsave(&s->lock, flags);
1321 if(s->dma_dac.count <0) {
1322  s->dma_dac.count =0;
1323  s->dma_dac.swptr = s->dma_dac.hwptr;
1324 }
1325  swptr = s->dma_dac.swptr;
1326  cnt = s->dma_dac.dmasize-swptr;
1327 if(s->dma_dac.count + cnt > s->dma_dac.dmasize)
1328  cnt = s->dma_dac.dmasize - s->dma_dac.count;
1329 spin_unlock_irqrestore(&s->lock, flags);
1330 if(cnt > count)
1331  cnt = count;
1332 if(cnt <=0) {
1333 start_dac(s);
1334 if(file->f_flags & O_NONBLOCK)
1335 return ret ? ret : -EAGAIN;
1336 if(!interruptible_sleep_on_timeout(&s->dma_dac.wait, HZ)) {
1337 printk(KERN_DEBUG "cmpci: write: chip lockup? dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
1338  s->dma_dac.dmasize, s->dma_dac.fragsize, s->dma_dac.count,
1339  s->dma_dac.hwptr, s->dma_dac.swptr);
1340 stop_dac(s);
1341 spin_lock_irqsave(&s->lock, flags);
1342 set_dmadac(s,virt_to_bus(s->dma_dac.rawbuf), s->dma_dac.dmasamples);
1343 /* program sample counts */
1344 outw(s->dma_dac.fragsamples-1, s->iobase + CODEC_CMI_CH0_FRAME2 +2);
1345  s->dma_dac.count = s->dma_dac.hwptr = s->dma_dac.swptr =0;
1346 spin_unlock_irqrestore(&s->lock, flags);
1347 }
1348 if(signal_pending(current))
1349 return ret ? ret : -ERESTARTSYS;
1350 continue;
1351 }
1352 if(copy_from_user(s->dma_dac.rawbuf + swptr, buffer, cnt))
1353 return ret ? ret : -EFAULT;
1354  swptr = (swptr + cnt) % s->dma_dac.dmasize;
1355 spin_lock_irqsave(&s->lock, flags);
1356  s->dma_dac.swptr = swptr;
1357  s->dma_dac.count += cnt;
1358  s->dma_dac.endcleared =0;
1359 spin_unlock_irqrestore(&s->lock, flags);
1360  count -= cnt;
1361  buffer += cnt;
1362  ret += cnt;
1363 start_dac(s);
1364 }
1365 return ret;
1366 }
1367
1368 /* No kernel lock - fine (we have our own spinlock) */
1369 static unsigned intcm_poll(struct file *file,struct poll_table_struct *wait)
1370 {
1371 struct cm_state *s = (struct cm_state *)file->private_data;
1372 unsigned long flags;
1373 unsigned int mask =0;
1374
1375 VALIDATE_STATE(s);
1376 if(file->f_mode & FMODE_WRITE) {
1377 if(!s->dma_dac.ready &&prog_dmabuf(s,0))
1378 return0;
1379 poll_wait(file, &s->dma_dac.wait, wait);
1380 }
1381 if(file->f_mode & FMODE_READ) {
1382 if(!s->dma_adc.ready &&prog_dmabuf(s,1))
1383 return0;
1384 poll_wait(file, &s->dma_adc.wait, wait);
1385 }
1386
1387 spin_lock_irqsave(&s->lock, flags);
1388 cm_update_ptr(s);
1389 if(file->f_mode & FMODE_READ) {
1390 if(s->dma_adc.count >= (signed)s->dma_adc.fragsize)
1391  mask |= POLLIN | POLLRDNORM;
1392 }
1393 if(file->f_mode & FMODE_WRITE) {
1394 if(s->dma_dac.mapped) {
1395 if(s->dma_dac.count >= (signed)s->dma_dac.fragsize)
1396  mask |= POLLOUT | POLLWRNORM;
1397 }else{
1398 if((signed)s->dma_dac.dmasize >= s->dma_dac.count + (signed)s->dma_dac.fragsize)
1399  mask |= POLLOUT | POLLWRNORM;
1400 }
1401 }
1402 spin_unlock_irqrestore(&s->lock, flags);
1403 return mask;
1404 }
1405
1406 static intcm_mmap(struct file *file,struct vm_area_struct *vma)
1407 {
1408 struct cm_state *s = (struct cm_state *)file->private_data;
1409 struct dmabuf *db;
1410 int ret = -EINVAL;
1411 unsigned long size;
1412
1413 VALIDATE_STATE(s);
1414 lock_kernel();
1415 if(vma->vm_flags & VM_WRITE) {
1416 if((ret =prog_dmabuf(s,1)) !=0)
1417 goto out;
1418  db = &s->dma_dac;
1419 }else if(vma->vm_flags & VM_READ) {
1420 if((ret =prog_dmabuf(s,0)) !=0)
1421 goto out;
1422  db = &s->dma_adc;
1423 }else
1424 goto out;
1425  ret = -EINVAL;
1426 if(vma->vm_pgoff !=0)
1427 goto out;
1428  size = vma->vm_end - vma->vm_start;
1429 if(size > (PAGE_SIZE << db->buforder))
1430 goto out;
1431  ret = -EAGAIN;
1432 if(remap_page_range(vma->vm_start,virt_to_phys(db->rawbuf), size, vma->vm_page_prot))
1433 goto out;
1434  db->mapped =1;
1435  ret =0;
1436 out:
1437 unlock_kernel();
1438 return ret;
1439 }
1440
1441 static intcm_ioctl(struct inode *inode,struct file *file,unsigned int cmd,unsigned long arg)
1442 {
1443 struct cm_state *s = (struct cm_state *)file->private_data;
1444 unsigned long flags;
1445  audio_buf_info abinfo;
1446  count_info cinfo;
1447 int val, mapped, ret;
1448 unsigned char fmtm, fmtd;
1449
1450 VALIDATE_STATE(s);
1451  mapped = ((file->f_mode & FMODE_WRITE) && s->dma_dac.mapped) ||
1452 ((file->f_mode & FMODE_READ) && s->dma_adc.mapped);
1453 switch(cmd) {
1454 case OSS_GETVERSION:
1455 returnput_user(SOUND_VERSION, (int*)arg);
1456
1457 case SNDCTL_DSP_SYNC:
1458 if(file->f_mode & FMODE_WRITE)
1459 returndrain_dac(s,0/*file->f_flags & O_NONBLOCK*/);
1460 return0;
1461
1462 case SNDCTL_DSP_SETDUPLEX:
1463 return0;
1464
1465 case SNDCTL_DSP_GETCAPS:
1466 returnput_user(DSP_CAP_DUPLEX | DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP, (int*)arg);
1467
1468 case SNDCTL_DSP_RESET:
1469 if(file->f_mode & FMODE_WRITE) {
1470 stop_dac(s);
1471 synchronize_irq();
1472  s->dma_dac.swptr = s->dma_dac.hwptr = s->dma_dac.count = s->dma_dac.total_bytes =0;
1473 }
1474 if(file->f_mode & FMODE_READ) {
1475 stop_adc(s);
1476 synchronize_irq();
1477  s->dma_adc.swptr = s->dma_adc.hwptr = s->dma_adc.count = s->dma_adc.total_bytes =0;
1478 }
1479 return0;
1480
1481 case SNDCTL_DSP_SPEED:
1482 if(get_user(val, (int*)arg))
1483 return-EFAULT;
1484 if(val >=0) {
1485 if(file->f_mode & FMODE_READ) {
1486 stop_adc(s);
1487  s->dma_adc.ready =0;
1488 set_adc_rate(s, val);
1489 }
1490 if(file->f_mode & FMODE_WRITE) {
1491 stop_dac(s);
1492  s->dma_dac.ready =0;
1493 set_dac_rate(s, val);
1494 }
1495 }
1496 returnput_user((file->f_mode & FMODE_READ) ? s->rateadc : s->ratedac, (int*)arg);
1497
1498 case SNDCTL_DSP_STEREO:
1499 if(get_user(val, (int*)arg))
1500 return-EFAULT;
1501  fmtd =0;
1502  fmtm = ~0;
1503 if(file->f_mode & FMODE_READ) {
1504 stop_adc(s);
1505  s->dma_adc.ready =0;
1506 if(val)
1507  fmtd |= CM_CFMT_STEREO << CM_CFMT_ADCSHIFT;
1508 else
1509  fmtm &= ~(CM_CFMT_STEREO << CM_CFMT_ADCSHIFT);
1510 }
1511 if(file->f_mode & FMODE_WRITE) {
1512 stop_dac(s);
1513  s->dma_dac.ready =0;
1514 if(val)
1515  fmtd |= CM_CFMT_STEREO << CM_CFMT_DACSHIFT;
1516 else
1517  fmtm &= ~(CM_CFMT_STEREO << CM_CFMT_DACSHIFT);
1518 }
1519 set_fmt(s, fmtm, fmtd);
1520 return0;
1521
1522 case SNDCTL_DSP_CHANNELS:
1523 if(get_user(val, (int*)arg))
1524 return-EFAULT;
1525 if(val !=0) {
1526  fmtd =0;
1527  fmtm = ~0;
1528 if(file->f_mode & FMODE_READ) {
1529 stop_adc(s);
1530  s->dma_adc.ready =0;
1531 if(val >=2)
1532  fmtd |= CM_CFMT_STEREO << CM_CFMT_ADCSHIFT;
1533 else
1534  fmtm &= ~(CM_CFMT_STEREO << CM_CFMT_ADCSHIFT);
1535 }
1536 if(file->f_mode & FMODE_WRITE) {
1537 stop_dac(s);
1538  s->dma_dac.ready =0;
1539 if(val >=2)
1540  fmtd |= CM_CFMT_STEREO << CM_CFMT_DACSHIFT;
1541 else
1542  fmtm &= ~(CM_CFMT_STEREO << CM_CFMT_DACSHIFT);
1543 }
1544 set_fmt(s, fmtm, fmtd);
1545 }
1546 returnput_user((s->fmt & ((file->f_mode & FMODE_READ) ? (CM_CFMT_STEREO << CM_CFMT_ADCSHIFT)
1547 : (CM_CFMT_STEREO << CM_CFMT_DACSHIFT))) ?2:1, (int*)arg);
1548
1549 case SNDCTL_DSP_GETFMTS:/* Returns a mask */
1550 returnput_user(AFMT_S16_LE|AFMT_U8, (int*)arg);
1551
1552 case SNDCTL_DSP_SETFMT:/* Selects ONE fmt*/
1553 if(get_user(val, (int*)arg))
1554 return-EFAULT;
1555 if(val != AFMT_QUERY) {
1556  fmtd =0;
1557  fmtm = ~0;
1558 if(file->f_mode & FMODE_READ) {
1559 stop_adc(s);
1560  s->dma_adc.ready =0;
1561 if(val == AFMT_S16_LE)
1562  fmtd |= CM_CFMT_16BIT << CM_CFMT_ADCSHIFT;
1563 else
1564  fmtm &= ~(CM_CFMT_16BIT << CM_CFMT_ADCSHIFT);
1565 }
1566 if(file->f_mode & FMODE_WRITE) {
1567 stop_dac(s);
1568  s->dma_dac.ready =0;
1569 if(val == AFMT_S16_LE)
1570  fmtd |= CM_CFMT_16BIT << CM_CFMT_DACSHIFT;
1571 else
1572  fmtm &= ~(CM_CFMT_16BIT << CM_CFMT_DACSHIFT);
1573 }
1574 set_fmt(s, fmtm, fmtd);
1575 }
1576 returnput_user((s->fmt & ((file->f_mode & FMODE_READ) ? (CM_CFMT_16BIT << CM_CFMT_ADCSHIFT)
1577 : (CM_CFMT_16BIT << CM_CFMT_DACSHIFT))) ? AFMT_S16_LE : AFMT_U8, (int*)arg);
1578
1579 case SNDCTL_DSP_POST:
1580 return0;
1581
1582 case SNDCTL_DSP_GETTRIGGER:
1583  val =0;
1584 if(file->f_mode & FMODE_READ && s->enable & CM_CENABLE_RE)
1585  val |= PCM_ENABLE_INPUT;
1586 if(file->f_mode & FMODE_WRITE && s->enable & CM_CENABLE_PE)
1587  val |= PCM_ENABLE_OUTPUT;
1588 returnput_user(val, (int*)arg);
1589
1590 case SNDCTL_DSP_SETTRIGGER:
1591 if(get_user(val, (int*)arg))
1592 return-EFAULT;
1593 if(file->f_mode & FMODE_READ) {
1594 if(val & PCM_ENABLE_INPUT) {
1595 if(!s->dma_adc.ready && (ret =prog_dmabuf(s,1)))
1596 return ret;
1597 start_adc(s);
1598 }else
1599 stop_adc(s);
1600 }
1601 if(file->f_mode & FMODE_WRITE) {
1602 if(val & PCM_ENABLE_OUTPUT) {
1603 if(!s->dma_dac.ready && (ret =prog_dmabuf(s,0)))
1604 return ret;
1605 start_dac(s);
1606 }else
1607 stop_dac(s);
1608 }
1609 return0;
1610
1611 case SNDCTL_DSP_GETOSPACE:
1612 if(!(file->f_mode & FMODE_WRITE))
1613 return-EINVAL;
1614 if(!s->dma_dac.ready && (ret =prog_dmabuf(s,0)))
1615 return ret;
1616 spin_lock_irqsave(&s->lock, flags);
1617 cm_update_ptr(s);
1618  abinfo.fragsize = s->dma_dac.fragsize;
1619  abinfo.bytes = s->dma_dac.dmasize - s->dma_dac.count;
1620  abinfo.fragstotal = s->dma_dac.numfrag;
1621  abinfo.fragments = abinfo.bytes >> s->dma_dac.fragshift;
1622 spin_unlock_irqrestore(&s->lock, flags);
1623 returncopy_to_user((void*)arg, &abinfo,sizeof(abinfo)) ? -EFAULT :0;
1624
1625 case SNDCTL_DSP_GETISPACE:
1626 if(!(file->f_mode & FMODE_READ))
1627 return-EINVAL;
1628 if(!s->dma_adc.ready && (ret =prog_dmabuf(s,1)))
1629 return ret;
1630 spin_lock_irqsave(&s->lock, flags);
1631 cm_update_ptr(s);
1632  abinfo.fragsize = s->dma_adc.fragsize;
1633  abinfo.bytes = s->dma_adc.count;
1634  abinfo.fragstotal = s->dma_adc.numfrag;
1635  abinfo.fragments = abinfo.bytes >> s->dma_adc.fragshift;
1636 spin_unlock_irqrestore(&s->lock, flags);
1637 returncopy_to_user((void*)arg, &abinfo,sizeof(abinfo)) ? -EFAULT :0;
1638
1639 case SNDCTL_DSP_NONBLOCK:
1640  file->f_flags |= O_NONBLOCK;
1641 return0;
1642
1643 case SNDCTL_DSP_GETODELAY:
1644 if(!(file->f_mode & FMODE_WRITE))
1645 return-EINVAL;
1646 if(!s->dma_dac.ready && (ret =prog_dmabuf(s,0)))
1647 return ret;
1648 spin_lock_irqsave(&s->lock, flags);
1649 cm_update_ptr(s);
1650  val = s->dma_dac.count;
1651 spin_unlock_irqrestore(&s->lock, flags);
1652 returnput_user(val, (int*)arg);
1653
1654 case SNDCTL_DSP_GETIPTR:
1655 if(!(file->f_mode & FMODE_READ))
1656 return-EINVAL;
1657 if(!s->dma_adc.ready && (ret =prog_dmabuf(s,1)))
1658 return ret;
1659 spin_lock_irqsave(&s->lock, flags);
1660 cm_update_ptr(s);
1661  cinfo.bytes = s->dma_adc.total_bytes;
1662  cinfo.blocks = s->dma_adc.count >> s->dma_adc.fragshift;
1663  cinfo.ptr = s->dma_adc.hwptr;
1664 if(s->dma_adc.mapped)
1665  s->dma_adc.count &= s->dma_adc.fragsize-1;
1666 spin_unlock_irqrestore(&s->lock, flags);
1667 returncopy_to_user((void*)arg, &cinfo,sizeof(cinfo));
1668
1669 case SNDCTL_DSP_GETOPTR:
1670 if(!(file->f_mode & FMODE_WRITE))
1671 return-EINVAL;
1672 if(!s->dma_dac.ready && (ret =prog_dmabuf(s,0)))
1673 return ret;
1674 spin_lock_irqsave(&s->lock, flags);
1675 cm_update_ptr(s);
1676  cinfo.bytes = s->dma_dac.total_bytes;
1677  cinfo.blocks = s->dma_dac.count >> s->dma_dac.fragshift;
1678  cinfo.ptr = s->dma_dac.hwptr;
1679 if(s->dma_dac.mapped)
1680  s->dma_dac.count &= s->dma_dac.fragsize-1;
1681 spin_unlock_irqrestore(&s->lock, flags);
1682 returncopy_to_user((void*)arg, &cinfo,sizeof(cinfo));
1683
1684 case SNDCTL_DSP_GETBLKSIZE:
1685 if(file->f_mode & FMODE_WRITE) {
1686 if((val =prog_dmabuf(s,0)))
1687 return val;
1688 returnput_user(s->dma_dac.fragsize, (int*)arg);
1689 }
1690 if((val =prog_dmabuf(s,1)))
1691 return val;
1692 returnput_user(s->dma_adc.fragsize, (int*)arg);
1693
1694 case SNDCTL_DSP_SETFRAGMENT:
1695 if(get_user(val, (int*)arg))
1696 return-EFAULT;
1697 if(file->f_mode & FMODE_READ) {
1698  s->dma_adc.ossfragshift = val &0xffff;
1699  s->dma_adc.ossmaxfrags = (val >>16) &0xffff;
1700 if(s->dma_adc.ossfragshift <4)
1701  s->dma_adc.ossfragshift =4;
1702 if(s->dma_adc.ossfragshift >15)
1703  s->dma_adc.ossfragshift =15;
1704 if(s->dma_adc.ossmaxfrags <4)
1705  s->dma_adc.ossmaxfrags =4;
1706 }
1707 if(file->f_mode & FMODE_WRITE) {
1708  s->dma_dac.ossfragshift = val &0xffff;
1709  s->dma_dac.ossmaxfrags = (val >>16) &0xffff;
1710 if(s->dma_dac.ossfragshift <4)
1711  s->dma_dac.ossfragshift =4;
1712 if(s->dma_dac.ossfragshift >15)
1713  s->dma_dac.ossfragshift =15;
1714 if(s->dma_dac.ossmaxfrags <4)
1715  s->dma_dac.ossmaxfrags =4;
1716 }
1717 return0;
1718
1719 case SNDCTL_DSP_SUBDIVIDE:
1720 if((file->f_mode & FMODE_READ && s->dma_adc.subdivision) ||
1721 (file->f_mode & FMODE_WRITE && s->dma_dac.subdivision))
1722 return-EINVAL;
1723 if(get_user(val, (int*)arg))
1724 return-EFAULT;
1725 if(val !=1&& val !=2&& val !=4)
1726 return-EINVAL;
1727 if(file->f_mode & FMODE_READ)
1728  s->dma_adc.subdivision = val;
1729 if(file->f_mode & FMODE_WRITE)
1730  s->dma_dac.subdivision = val;
1731 return0;
1732
1733 case SOUND_PCM_READ_RATE:
1734 returnput_user((file->f_mode & FMODE_READ) ? s->rateadc : s->ratedac, (int*)arg);
1735
1736 case SOUND_PCM_READ_CHANNELS:
1737 returnput_user((s->fmt & ((file->f_mode & FMODE_READ) ? (CM_CFMT_STEREO << CM_CFMT_ADCSHIFT) : (CM_CFMT_STEREO << CM_CFMT_DACSHIFT))) ?2:1, (int*)arg);
1738
1739 case SOUND_PCM_READ_BITS:
1740 returnput_user((s->fmt & ((file->f_mode & FMODE_READ) ? (CM_CFMT_16BIT << CM_CFMT_ADCSHIFT) : (CM_CFMT_16BIT << CM_CFMT_DACSHIFT))) ?16:8, (int*)arg);
1741
1742 case SOUND_PCM_READ_FILTER:
1743 returnput_user((file->f_mode & FMODE_READ) ? s->rateadc : s->ratedac, (int*)arg);
1744
1745 case SOUND_PCM_WRITE_FILTER:
1746 case SNDCTL_DSP_SETSYNCRO:
1747 return-EINVAL;
1748
1749 }
1750 returnmixer_ioctl(s, cmd, arg);
1751 }
1752
1753 static intcm_open(struct inode *inode,struct file *file)
1754 {
1755 int minor =MINOR(inode->i_rdev);
1756 struct cm_state *s = devs;
1757 unsigned char fmtm = ~0, fmts =0;
1758
1759 while(s && ((s->dev_audio ^ minor) & ~0xf))
1760  s = s->next;
1761 if(!s)
1762 return-ENODEV;
1763 VALIDATE_STATE(s);
1764  file->private_data = s;
1765 /* wait for device to become free */
1766 down(&s->open_sem);
1767 while(s->open_mode & file->f_mode) {
1768 if(file->f_flags & O_NONBLOCK) {
1769 up(&s->open_sem);
1770 return-EBUSY;
1771 }
1772 up(&s->open_sem);
1773 interruptible_sleep_on(&s->open_wait);
1774 if(signal_pending(current))
1775 return-ERESTARTSYS;
1776 down(&s->open_sem);
1777 }
1778 if(file->f_mode & FMODE_READ) {
1779  fmtm &= ~((CM_CFMT_STEREO | CM_CFMT_16BIT) << CM_CFMT_ADCSHIFT);
1780 if((minor &0xf) == SND_DEV_DSP16)
1781  fmts |= CM_CFMT_16BIT << CM_CFMT_ADCSHIFT;
1782  s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags = s->dma_adc.subdivision =0;
1783 set_adc_rate(s,8000);
1784 }
1785 if(file->f_mode & FMODE_WRITE) {
1786  fmtm &= ~((CM_CFMT_STEREO | CM_CFMT_16BIT) << CM_CFMT_DACSHIFT);
1787 if((minor &0xf) == SND_DEV_DSP16)
1788  fmts |= CM_CFMT_16BIT << CM_CFMT_DACSHIFT;
1789  s->dma_dac.ossfragshift = s->dma_dac.ossmaxfrags = s->dma_dac.subdivision =0;
1790 set_dac_rate(s,8000);
1791 }
1792 set_fmt(s, fmtm, fmts);
1793  s->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
1794 up(&s->open_sem);
1795 return0;
1796 }
1797
1798 static intcm_release(struct inode *inode,struct file *file)
1799 {
1800 struct cm_state *s = (struct cm_state *)file->private_data;
1801
1802 VALIDATE_STATE(s);
1803 lock_kernel();
1804 if(file->f_mode & FMODE_WRITE)
1805 drain_dac(s, file->f_flags & O_NONBLOCK);
1806 down(&s->open_sem);
1807 if(file->f_mode & FMODE_WRITE) {
1808 stop_dac(s);
1809 dealloc_dmabuf(&s->dma_dac);
1810 }
1811 if(file->f_mode & FMODE_READ) {
1812 stop_adc(s);
1813 dealloc_dmabuf(&s->dma_adc);
1814 }
1815  s->open_mode &= (~file->f_mode) & (FMODE_READ|FMODE_WRITE);
1816 up(&s->open_sem);
1817 wake_up(&s->open_wait);
1818 unlock_kernel();
1819 return0;
1820 }
1821
1822 static/*const*/struct file_operations cm_audio_fops = {
1823  owner: THIS_MODULE,
1824  llseek: cm_llseek,
1825  read: cm_read,
1826  write: cm_write,
1827  poll: cm_poll,
1828  ioctl: cm_ioctl,
1829  mmap: cm_mmap,
1830  open: cm_open,
1831  release: cm_release,
1832 };
1833
1834 /* --------------------------------------------------------------------- */
1835
1836 static ssize_t cm_midi_read(struct file *file,char*buffer,size_t count, loff_t *ppos)
1837 {
1838 struct cm_state *s = (struct cm_state *)file->private_data;
1839 DECLARE_WAITQUEUE(wait, current);
1840  ssize_t ret;
1841 unsigned long flags;
1842 unsigned ptr;
1843 int cnt;
1844
1845 VALIDATE_STATE(s);
1846 if(ppos != &file->f_pos)
1847 return-ESPIPE;
1848 if(!access_ok(VERIFY_WRITE, buffer, count))
1849 return-EFAULT;
1850 if(count ==0)
1851 return0;
1852  ret =0;
1853 add_wait_queue(&s->midi.iwait, &wait);
1854 while(count >0) {
1855 set_current_state(TASK_INTERRUPTIBLE);
1856 spin_lock_irqsave(&s->lock, flags);
1857  ptr = s->midi.ird;
1858  cnt = MIDIINBUF - ptr;
1859 if(s->midi.icnt < cnt)
1860  cnt = s->midi.icnt;
1861 spin_unlock_irqrestore(&s->lock, flags);
1862 if(cnt > count)
1863  cnt = count;
1864 if(cnt <=0) {
1865 if(file->f_flags & O_NONBLOCK)
1866 {
1867 if(!ret)
1868  ret = -EAGAIN;
1869 break;
1870 }
1871 schedule();
1872 if(signal_pending(current))
1873 {
1874 if(!ret)
1875  ret = -ERESTARTSYS;
1876 break;
1877 }
1878 continue;
1879 }
1880 if(copy_to_user(buffer, s->midi.ibuf + ptr, cnt)) {
1881 if(!ret)
1882  ret = -EFAULT;
1883 break;
1884 }
1885  ptr = (ptr + cnt) % MIDIINBUF;
1886 spin_lock_irqsave(&s->lock, flags);
1887  s->midi.ird = ptr;
1888  s->midi.icnt -= cnt;
1889 spin_unlock_irqrestore(&s->lock, flags);
1890  count -= cnt;
1891  buffer += cnt;
1892  ret += cnt;
1893 break;
1894 }
1895 __set_current_state(TASK_RUNNING);
1896 remove_wait_queue(&s->midi.iwait, &wait);
1897 return ret;
1898 }
1899
1900 static ssize_t cm_midi_write(struct file *file,const char*buffer,size_t count, loff_t *ppos)
1901 {
1902 struct cm_state *s = (struct cm_state *)file->private_data;
1903 DECLARE_WAITQUEUE(wait, current);
1904  ssize_t ret;
1905 unsigned long flags;
1906 unsigned ptr;
1907 int cnt;
1908
1909 VALIDATE_STATE(s);
1910 if(ppos != &file->f_pos)
1911 return-ESPIPE;
1912 if(!access_ok(VERIFY_READ, buffer, count))
1913 return-EFAULT;
1914 if(count ==0)
1915 return0;
1916  ret =0;
1917 add_wait_queue(&s->midi.owait, &wait);
1918 while(count >0) {
1919 set_current_state(TASK_INTERRUPTIBLE);
1920 spin_lock_irqsave(&s->lock, flags);
1921  ptr = s->midi.owr;
1922  cnt = MIDIOUTBUF - ptr;
1923 if(s->midi.ocnt + cnt > MIDIOUTBUF)
1924  cnt = MIDIOUTBUF - s->midi.ocnt;
1925 if(cnt <=0)
1926 cm_handle_midi(s);
1927 spin_unlock_irqrestore(&s->lock, flags);
1928 if(cnt > count)
1929  cnt = count;
1930 if(cnt <=0) {
1931 if(file->f_flags & O_NONBLOCK) {
1932 if(!ret)
1933  ret = -EAGAIN;
1934 break;
1935 }
1936 schedule();
1937 if(signal_pending(current)) {
1938 if(!ret)
1939  ret = -ERESTARTSYS;
1940 break;
1941 }
1942 continue;
1943 }
1944 if(copy_from_user(s->midi.obuf + ptr, buffer, cnt)) {
1945 if(!ret)
1946  ret = -EFAULT;
1947 break;
1948 }
1949  ptr = (ptr + cnt) % MIDIOUTBUF;
1950 spin_lock_irqsave(&s->lock, flags);
1951  s->midi.owr = ptr;
1952  s->midi.ocnt += cnt;
1953 spin_unlock_irqrestore(&s->lock, flags);
1954  count -= cnt;
1955  buffer += cnt;
1956  ret += cnt;
1957 spin_lock_irqsave(&s->lock, flags);
1958 cm_handle_midi(s);
1959 spin_unlock_irqrestore(&s->lock, flags);
1960 }
1961 __set_current_state(TASK_RUNNING);
1962 remove_wait_queue(&s->midi.owait, &wait);
1963 return ret;
1964 }
1965
1966 static unsigned intcm_midi_poll(struct file *file,struct poll_table_struct *wait)
1967 {
1968 struct cm_state *s = (struct cm_state *)file->private_data;
1969 unsigned long flags;
1970 unsigned int mask =0;
1971
1972 VALIDATE_STATE(s);
1973 if(file->f_mode & FMODE_WRITE)
1974 poll_wait(file, &s->midi.owait, wait);
1975 if(file->f_mode & FMODE_READ)
1976 poll_wait(file, &s->midi.iwait, wait);
1977 spin_lock_irqsave(&s->lock, flags);
1978 if(file->f_mode & FMODE_READ) {
1979 if(s->midi.icnt >0)
1980  mask |= POLLIN | POLLRDNORM;
1981 }
1982 if(file->f_mode & FMODE_WRITE) {
1983 if(s->midi.ocnt < MIDIOUTBUF)
1984  mask |= POLLOUT | POLLWRNORM;
1985 }
1986 spin_unlock_irqrestore(&s->lock, flags);
1987 return mask;
1988 }
1989
1990 static intcm_midi_open(struct inode *inode,struct file *file)
1991 {
1992 int minor =MINOR(inode->i_rdev);
1993 struct cm_state *s = devs;
1994 unsigned long flags;
1995
1996 while(s && s->dev_midi != minor)
1997  s = s->next;
1998 if(!s)
1999 return-ENODEV;
2000 VALIDATE_STATE(s);
2001  file->private_data = s;
2002 /* wait for device to become free */
2003 down(&s->open_sem);
2004 while(s->open_mode & (file->f_mode << FMODE_MIDI_SHIFT)) {
2005 if(file->f_flags & O_NONBLOCK) {
2006 up(&s->open_sem);
2007 return-EBUSY;
2008 }
2009 up(&s->open_sem);
2010 interruptible_sleep_on(&s->open_wait);
2011 if(signal_pending(current))
2012 return-ERESTARTSYS;
2013 down(&s->open_sem);
2014 }
2015 spin_lock_irqsave(&s->lock, flags);
2016 if(!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
2017  s->midi.ird = s->midi.iwr = s->midi.icnt =0;
2018  s->midi.ord = s->midi.owr = s->midi.ocnt =0;
2019 /* enable MPU-401 */
2020 outb(inb(s->iobase + CODEC_CMI_FUNCTRL1) |4, s->iobase + CODEC_CMI_FUNCTRL1);
2021 outb(0xff, s->iomidi+1);/* reset command */
2022 if(!(inb(s->iomidi+1) &0x80))
2023 inb(s->iomidi);
2024 outb(0x3f, s->iomidi+1);/* uart command */
2025 if(!(inb(s->iomidi+1) &0x80))
2026 inb(s->iomidi);
2027  s->midi.ird = s->midi.iwr = s->midi.icnt =0;
2028 init_timer(&s->midi.timer);
2029  s->midi.timer.expires = jiffies+1;
2030  s->midi.timer.data = (unsigned long)s;
2031  s->midi.timer.function = cm_midi_timer;
2032 add_timer(&s->midi.timer);
2033 }
2034 if(file->f_mode & FMODE_READ) {
2035  s->midi.ird = s->midi.iwr = s->midi.icnt =0;
2036 }
2037 if(file->f_mode & FMODE_WRITE) {
2038  s->midi.ord = s->midi.owr = s->midi.ocnt =0;
2039 }
2040 spin_unlock_irqrestore(&s->lock, flags);
2041  s->open_mode |= (file->f_mode << FMODE_MIDI_SHIFT) & (FMODE_MIDI_READ | FMODE_MIDI_WRITE);
2042 up(&s->open_sem);
2043 return0;
2044 }
2045
2046 static intcm_midi_release(struct inode *inode,struct file *file)
2047 {
2048 struct cm_state *s = (struct cm_state *)file->private_data;
2049 DECLARE_WAITQUEUE(wait, current);
2050 unsigned long flags;
2051 unsigned count, tmo;
2052
2053 VALIDATE_STATE(s);
2054
2055 lock_kernel();
2056 if(file->f_mode & FMODE_WRITE) {
2057 add_wait_queue(&s->midi.owait, &wait);
2058 for(;;) {
2059 set_current_state(TASK_INTERRUPTIBLE);
2060 spin_lock_irqsave(&s->lock, flags);
2061  count = s->midi.ocnt;
2062 spin_unlock_irqrestore(&s->lock, flags);
2063 if(count <=0)
2064 break;
2065 if(signal_pending(current))
2066 break;
2067 if(file->f_flags & O_NONBLOCK) {
2068 remove_wait_queue(&s->midi.owait, &wait);
2069 set_current_state(TASK_RUNNING);
2070 return-EBUSY;
2071 }
2072  tmo = (count * HZ) /3100;
2073 if(!schedule_timeout(tmo ? :1) && tmo)
2074 printk(KERN_DEBUG "cmpci: midi timed out??\n");
2075 }
2076 remove_wait_queue(&s->midi.owait, &wait);
2077 set_current_state(TASK_RUNNING);
2078 }
2079 down(&s->open_sem);
2080  s->open_mode &= (~(file->f_mode << FMODE_MIDI_SHIFT)) & (FMODE_MIDI_READ|FMODE_MIDI_WRITE);
2081 spin_lock_irqsave(&s->lock, flags);
2082 if(!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
2083 del_timer(&s->midi.timer);
2084 outb(0xff, s->iomidi+1);/* reset command */
2085 if(!(inb(s->iomidi+1) &0x80))
2086 inb(s->iomidi);
2087 /* disable MPU-401 */
2088 outb(inb(s->iobase + CODEC_CMI_FUNCTRL1) & ~4, s->iobase + CODEC_CMI_FUNCTRL1);
2089 }
2090 spin_unlock_irqrestore(&s->lock, flags);
2091 up(&s->open_sem);
2092 wake_up(&s->open_wait);
2093 unlock_kernel();
2094 return0;
2095 }
2096
2097 static/*const*/struct file_operations cm_midi_fops = {
2098  owner: THIS_MODULE,
2099  llseek: cm_llseek,
2100  read: cm_midi_read,
2101  write: cm_midi_write,
2102  poll: cm_midi_poll,
2103  open: cm_midi_open,
2104  release: cm_midi_release,
2105 };
2106
2107 /* --------------------------------------------------------------------- */
2108
2109 static intcm_dmfm_ioctl(struct inode *inode,struct file *file,unsigned int cmd,unsigned long arg)
2110 {
2111 static const unsigned char op_offset[18] = {
2112 0x00,0x01,0x02,0x03,0x04,0x05,
2113 0x08,0x09,0x0A,0x0B,0x0C,0x0D,
2114 0x10,0x11,0x12,0x13,0x14,0x15
2115 };
2116 struct cm_state *s = (struct cm_state *)file->private_data;
2117 struct dm_fm_voice v;
2118 struct dm_fm_note n;
2119 struct dm_fm_params p;
2120 unsigned int io;
2121 unsigned int regb;
2122
2123 switch(cmd) {
2124 case FM_IOCTL_RESET:
2125 for(regb =0xb0; regb <0xb9; regb++) {
2126 outb(regb, s->iosynth);
2127 outb(0, s->iosynth+1);
2128 outb(regb, s->iosynth+2);
2129 outb(0, s->iosynth+3);
2130 }
2131 return0;
2132
2133 case FM_IOCTL_PLAY_NOTE:
2134 if(copy_from_user(&n, (void*)arg,sizeof(n)))
2135 return-EFAULT;
2136 if(n.voice >=18)
2137 return-EINVAL;
2138 if(n.voice >=9) {
2139  regb = n.voice -9;
2140  io = s->iosynth+2;
2141 }else{
2142  regb = n.voice;
2143  io = s->iosynth;
2144 }
2145 outb(0xa0+ regb, io);
2146 outb(n.fnum &0xff, io+1);
2147 outb(0xb0+ regb, io);
2148 outb(((n.fnum >>8) &3) | ((n.octave &7) <<2) | ((n.key_on &1) <<5), io+1);
2149 return0;
2150
2151 case FM_IOCTL_SET_VOICE:
2152 if(copy_from_user(&v, (void*)arg,sizeof(v)))
2153 return-EFAULT;
2154 if(v.voice >=18)
2155 return-EINVAL;
2156  regb = op_offset[v.voice];
2157  io = s->iosynth + ((v.op &1) <<1);
2158 outb(0x20+ regb, io);
2159 outb(((v.am &1) <<7) | ((v.vibrato &1) <<6) | ((v.do_sustain &1) <<5) |
2160 ((v.kbd_scale &1) <<4) | (v.harmonic &0xf), io+1);
2161 outb(0x40+ regb, io);
2162 outb(((v.scale_level &0x3) <<6) | (v.volume &0x3f), io+1);
2163 outb(0x60+ regb, io);
2164 outb(((v.attack &0xf) <<4) | (v.decay &0xf), io+1);
2165 outb(0x80+ regb, io);
2166 outb(((v.sustain &0xf) <<4) | (v.release &0xf), io+1);
2167 outb(0xe0+ regb, io);
2168 outb(v.waveform &0x7, io+1);
2169 if(n.voice >=9) {
2170  regb = n.voice -9;
2171  io = s->iosynth+2;
2172 }else{
2173  regb = n.voice;
2174  io = s->iosynth;
2175 }
2176 outb(0xc0+ regb, io);
2177 outb(((v.right &1) <<5) | ((v.left &1) <<4) | ((v.feedback &7) <<1) |
2178 (v.connection &1), io+1);
2179 return0;
2180
2181 case FM_IOCTL_SET_PARAMS:
2182 if(copy_from_user(&p, (void*)arg,sizeof(p)))
2183 return-EFAULT;
2184 outb(0x08, s->iosynth);
2185 outb((p.kbd_split &1) <<6, s->iosynth+1);
2186 outb(0xbd, s->iosynth);
2187 outb(((p.am_depth &1) <<7) | ((p.vib_depth &1) <<6) | ((p.rhythm &1) <<5) | ((p.bass &1) <<4) |
2188 ((p.snare &1) <<3) | ((p.tomtom &1) <<2) | ((p.cymbal &1) <<1) | (p.hihat &1), s->iosynth+1);
2189 return0;
2190
2191 case FM_IOCTL_SET_OPL:
2192 outb(4, s->iosynth+2);
2193 outb(arg, s->iosynth+3);
2194 return0;
2195
2196 case FM_IOCTL_SET_MODE:
2197 outb(5, s->iosynth+2);
2198 outb(arg &1, s->iosynth+3);
2199 return0;
2200
2201 default:
2202 return-EINVAL;
2203 }
2204 }
2205
2206 static intcm_dmfm_open(struct inode *inode,struct file *file)
2207 {
2208 int minor =MINOR(inode->i_rdev);
2209 struct cm_state *s = devs;
2210
2211 while(s && s->dev_dmfm != minor)
2212  s = s->next;
2213 if(!s)
2214 return-ENODEV;
2215 VALIDATE_STATE(s);
2216  file->private_data = s;
2217 /* wait for device to become free */
2218 down(&s->open_sem);
2219 while(s->open_mode & FMODE_DMFM) {
2220 if(file->f_flags & O_NONBLOCK) {
2221 up(&s->open_sem);
2222 return-EBUSY;
2223 }
2224 up(&s->open_sem);
2225 interruptible_sleep_on(&s->open_wait);
2226 if(signal_pending(current))
2227 return-ERESTARTSYS;
2228 down(&s->open_sem);
2229 }
2230 /* init the stuff */
2231 outb(1, s->iosynth);
2232 outb(0x20, s->iosynth+1);/* enable waveforms */
2233 outb(4, s->iosynth+2);
2234 outb(0, s->iosynth+3);/* no 4op enabled */
2235 outb(5, s->iosynth+2);
2236 outb(1, s->iosynth+3);/* enable OPL3 */
2237  s->open_mode |= FMODE_DMFM;
2238 up(&s->open_sem);
2239 return0;
2240 }
2241
2242 static intcm_dmfm_release(struct inode *inode,struct file *file)
2243 {
2244 struct cm_state *s = (struct cm_state *)file->private_data;
2245 unsigned int regb;
2246
2247 VALIDATE_STATE(s);
2248 lock_kernel();
2249 down(&s->open_sem);
2250  s->open_mode &= ~FMODE_DMFM;
2251 for(regb =0xb0; regb <0xb9; regb++) {
2252 outb(regb, s->iosynth);
2253 outb(0, s->iosynth+1);
2254 outb(regb, s->iosynth+2);
2255 outb(0, s->iosynth+3);
2256 }
2257 up(&s->open_sem);
2258 wake_up(&s->open_wait);
2259 unlock_kernel();
2260 return0;
2261 }
2262
2263 static/*const*/struct file_operations cm_dmfm_fops = {
2264  owner: THIS_MODULE,
2265  llseek: cm_llseek,
2266  ioctl: cm_dmfm_ioctl,
2267  open: cm_dmfm_open,
2268  release: cm_dmfm_release,
2269 };
2270
2271 /* --------------------------------------------------------------------- */
2272
2273 /* maximum number of devices */
2274 #define NR_DEVICE 5
2275
2276 #if 0
2277 static int reverb[NR_DEVICE] = {0, };
2278
2279 static int wavetable[NR_DEVICE] = {0, };
2280 #endif
2281
2282 /* --------------------------------------------------------------------- */
2283
2284 static struct initvol {
2285 int mixch;
2286 int vol;
2287 } initvol[] __initdata = {
2288 { SOUND_MIXER_WRITE_CD,0x4040},
2289 { SOUND_MIXER_WRITE_LINE,0x4040},
2290 { SOUND_MIXER_WRITE_MIC,0x4040},
2291 { SOUND_MIXER_WRITE_SYNTH,0x4040},
2292 { SOUND_MIXER_WRITE_VOLUME,0x4040},
2293 { SOUND_MIXER_WRITE_PCM,0x4040}
2294 };
2295
2296 #ifdef MODULE
2297 static int spdif_loop =0;
2298 static int four_ch =0;
2299 static int rear_out =0;
2300 MODULE_PARM(spdif_loop,"i");
2301 MODULE_PARM(four_ch,"i");
2302 MODULE_PARM(rear_out,"i");
2303 #else
2304 #ifdef CONFIG_SOUND_CMPCI_SPDIFLOOP
2305 static int spdif_loop =1;
2306 #else
2307 static int spdif_loop =0;
2308 #endif
2309 #ifdef CONFIG_SOUND_CMPCI_4CH
2310 static int four_ch =1;
2311 #else
2312 static int four_ch =0;
2313 #endif
2314 #ifdef CONFIG_SOUND_CMPCI_REAR
2315 static int rear_out =1;
2316 #else
2317 static int rear_out =0;
2318 #endif
2319 #endif
2320
2321 static int __init init_cmpci(void)
2322 {
2323 struct cm_state *s;
2324 struct pci_dev *pcidev = NULL;
2325  mm_segment_t fs;
2326 int i, val, index =0;
2327
2328 struct{
2329 unsigned short deviceid;
2330 char*devicename;
2331 } devicetable[] =
2332 {
2333 { PCI_DEVICE_ID_CMEDIA_CM8338A,"CM8338A"},
2334 { PCI_DEVICE_ID_CMEDIA_CM8338B,"CM8338B"},
2335 { PCI_DEVICE_ID_CMEDIA_CM8738,"CM8738"},
2336 };
2337 char*devicename ="unknown";
2338
2339 #ifdef CONFIG_PCI
2340 if(!pci_present())/* No PCI bus in this machine! */
2341 #endif
2342 return-ENODEV;
2343 printk(KERN_INFO "cmpci: version v2.41-nomodem time " __TIME__ " " __DATE__ "\n");
2344 #if 0
2345 if(!(wavetable_mem =__get_free_pages(GFP_KERNEL,20-PAGE_SHIFT)))
2346 printk(KERN_INFO "cmpci: cannot allocate 1MB of contiguous nonpageable memory for wavetable data\n");
2347 #endif
2348 while(index < NR_DEVICE && pcidev == NULL && (
2349 (pcidev =pci_find_device(PCI_VENDOR_ID_CMEDIA, PCI_DEVICE_ID_CMEDIA_CM8338A, pcidev)) ||
2350 (pcidev =pci_find_device(PCI_VENDOR_ID_CMEDIA, PCI_DEVICE_ID_CMEDIA_CM8338B, pcidev)) ||
2351 (pcidev =pci_find_device(PCI_VENDOR_ID_CMEDIA, PCI_DEVICE_ID_CMEDIA_CM8738, pcidev)))) {
2352 if(pci_enable_device(pcidev))
2353 continue;
2354 if(pcidev->irq ==0)
2355 continue;
2356 if(!(s =kmalloc(sizeof(struct cm_state), GFP_KERNEL))) {
2357 printk(KERN_WARNING "cmpci: out of memory\n");
2358 continue;
2359 }
2360 /* search device name */
2361 for(i =0; i <sizeof(devicetable) /sizeof(devicetable[0]); i++)
2362 {
2363 if(devicetable[i].deviceid == pcidev->device)
2364 {
2365  devicename = devicetable[i].devicename;
2366 break;
2367 }
2368 }
2369 memset(s,0,sizeof(struct cm_state));
2370 init_waitqueue_head(&s->dma_adc.wait);
2371 init_waitqueue_head(&s->dma_dac.wait);
2372 init_waitqueue_head(&s->open_wait);
2373 init_waitqueue_head(&s->midi.iwait);
2374 init_waitqueue_head(&s->midi.owait);
2375 init_MUTEX(&s->open_sem);
2376 spin_lock_init(&s->lock);
2377  s->magic = CM_MAGIC;
2378  s->iobase =pci_resource_start(pcidev,0);
2379  s->iosynth =0x388;
2380  s->iomidi =0x330;
2381 spin_lock_init(&s->lock);
2382 if(s->iobase ==0)
2383 continue;
2384  s->irq = pcidev->irq;
2385
2386 if(!request_region(s->iobase, CM_EXTENT_CODEC,"cmpci")) {
2387 printk(KERN_ERR "cmpci: io ports %#x-%#x in use\n", s->iobase, s->iobase+CM_EXTENT_CODEC-1);
2388 goto err_region5;
2389 }
2390 if(!request_region(s->iomidi, CM_EXTENT_MIDI,"cmpci Midi")) {
2391 printk(KERN_WARNING "cmpci: io ports %#x-%#x in use, midi disabled.\n", s->iomidi, s->iomidi+CM_EXTENT_MIDI-1);
2392  s->iomidi =0;
2393 }
2394 else
2395 {
2396 /* set IO based at 0x330 */
2397 outb(inb(s->iobase + CODEC_CMI_LEGACY_CTRL +3) & ~0x60, s->iobase + CODEC_CMI_LEGACY_CTRL +3);
2398 }
2399 if(!request_region(s->iosynth, CM_EXTENT_SYNTH,"cmpci FM")) {
2400 printk(KERN_WARNING "cmpci: io ports %#x-%#x in use, synth disabled.\n", s->iosynth, s->iosynth+CM_EXTENT_SYNTH-1);
2401  s->iosynth =0;
2402 }
2403 else
2404 {
2405 /* enable FM */
2406 outb(inb(s->iobase + CODEC_CMI_MISC_CTRL +2) |8, s->iobase + CODEC_CMI_MISC_CTRL);
2407 }
2408 /* initialize codec registers */
2409 outb(0, s->iobase + CODEC_CMI_INT_HLDCLR +2);/* disable ints */
2410 outb(0, s->iobase + CODEC_CMI_FUNCTRL0 +2);/* disable channels */
2411 /* reset mixer */
2412 wrmixer(s, DSP_MIX_DATARESETIDX,0);
2413
2414 /* request irq */
2415 if(request_irq(s->irq, cm_interrupt, SA_SHIRQ,"cmpci", s)) {
2416 printk(KERN_ERR "cmpci: irq %u in use\n", s->irq);
2417 goto err_irq;
2418 }
2419 printk(KERN_INFO "cmpci: found %s adapter at io %#06x irq %u\n",
2420  devicename, s->iobase, s->irq);
2421 /* register devices */
2422 if((s->dev_audio =register_sound_dsp(&cm_audio_fops, -1)) <0)
2423 goto err_dev1;
2424 if((s->dev_mixer =register_sound_mixer(&cm_mixer_fops, -1)) <0)
2425 goto err_dev2;
2426 if(s->iomidi && (s->dev_midi =register_sound_midi(&cm_midi_fops, -1)) <0)
2427 goto err_dev3;
2428 if(s->iosynth && (s->dev_dmfm =register_sound_special(&cm_dmfm_fops,15/* ?? */)) <0)
2429 goto err_dev4;
2430 pci_set_master(pcidev);
2431 /* initialize the chips */
2432  fs =get_fs();
2433 set_fs(KERNEL_DS);
2434 /* set mixer output */
2435 frobindir(s, DSP_MIX_OUTMIXIDX,0x1f,0x1f);
2436 /* set mixer input */
2437  val = SOUND_MASK_LINE|SOUND_MASK_SYNTH|SOUND_MASK_CD|SOUND_MASK_MIC;
2438 mixer_ioctl(s, SOUND_MIXER_WRITE_RECSRC, (unsigned long)&val);
2439 for(i =0; i <sizeof(initvol)/sizeof(initvol[0]); i++) {
2440  val = initvol[i].vol;
2441 mixer_ioctl(s, initvol[i].mixch, (unsigned long)&val);
2442 }
2443 set_fs(fs);
2444 if(pcidev->device == PCI_DEVICE_ID_CMEDIA_CM8738)
2445 {
2446 /* enable SPDIF loop */
2447 if(spdif_loop)
2448 {
2449 /* turn on spdif-in to spdif-out */
2450 outb(inb(s->iobase + CODEC_CMI_FUNCTRL1) |0x80, s->iobase + CODEC_CMI_FUNCTRL1);
2451 printk(KERN_INFO "cmpci: Enable SPDIF loop\n");
2452 }
2453 else
2454 outb(inb(s->iobase + CODEC_CMI_FUNCTRL1) & ~0x80, s->iobase + CODEC_CMI_FUNCTRL1);
2455 /* enable 4 channels mode */
2456 if(four_ch)
2457 {
2458 /* 4 channel mode (analog duplicate) */
2459 outb(inb(s->iobase + CODEC_CMI_MISC_CTRL +3) |0x04, s->iobase + CODEC_CMI_MISC_CTRL +3);
2460 printk(KERN_INFO "cmpci: Enable 4 channels mode\n");
2461 /* has separate rear-out jack ? */
2462 if(rear_out)
2463 {
2464 /* has separate rear out jack */
2465 outb(inb(s->iobase + CODEC_CMI_MIXER1) & ~0x20, s->iobase + CODEC_CMI_MIXER1);
2466 }
2467 else
2468 {
2469 outb(inb(s->iobase + CODEC_CMI_MIXER1) |0x20, s->iobase + CODEC_CMI_MIXER1);
2470 printk(KERN_INFO "cmpci: line-in routed as rear-out\n");
2471 }
2472 }
2473 else
2474 outb(inb(s->iobase + CODEC_CMI_MISC_CTRL +3) & ~0x04, s->iobase + CODEC_CMI_MISC_CTRL +3);
2475 }
2476 /* queue it for later freeing */
2477  s->next = devs;
2478  devs = s;
2479  index++;
2480 continue;
2481
2482  err_dev4:
2483 unregister_sound_midi(s->dev_midi);
2484  err_dev3:
2485 unregister_sound_mixer(s->dev_mixer);
2486  err_dev2:
2487 unregister_sound_dsp(s->dev_audio);
2488  err_dev1:
2489 printk(KERN_ERR "cmpci: cannot register misc device\n");
2490 free_irq(s->irq, s);
2491  err_irq:
2492 if(s->iosynth)
2493 release_region(s->iosynth, CM_EXTENT_SYNTH);
2494 if(s->iomidi)
2495 release_region(s->iomidi, CM_EXTENT_MIDI);
2496 release_region(s->iobase, CM_EXTENT_CODEC);
2497  err_region5:
2498 kfree(s);
2499 }
2500 if(!devs) {
2501 if(wavetable_mem)
2502 free_pages(wavetable_mem,20-PAGE_SHIFT);
2503 return-ENODEV;
2504 }
2505 return0;
2506 }
2507
2508 /* --------------------------------------------------------------------- */
2509
2510 MODULE_AUTHOR("ChenLi Tien, cltien@home.com");
2511 MODULE_DESCRIPTION("CMPCI Audio Driver");
2512
2513 static void __exit cleanup_cmpci(void)
2514 {
2515 struct cm_state *s;
2516
2517 while((s = devs)) {
2518  devs = devs->next;
2519 outb(0, s->iobase + CODEC_CMI_INT_HLDCLR +2);/* disable ints */
2520 synchronize_irq();
2521 outb(0, s->iobase + CODEC_CMI_FUNCTRL0 +2);/* disable channels */
2522 free_irq(s->irq, s);
2523
2524 /* reset mixer */
2525 wrmixer(s, DSP_MIX_DATARESETIDX,0);
2526
2527 release_region(s->iobase, CM_EXTENT_CODEC);
2528 if(s->iomidi)
2529 {
2530 release_region(s->iomidi, CM_EXTENT_MIDI);
2531 unregister_sound_midi(s->dev_midi);
2532 }
2533 if(s->iosynth)
2534 {
2535 release_region(s->iosynth, CM_EXTENT_SYNTH);
2536 unregister_sound_special(s->dev_dmfm);
2537 }
2538 unregister_sound_dsp(s->dev_audio);
2539 unregister_sound_mixer(s->dev_mixer);
2540 kfree(s);
2541 }
2542 if(wavetable_mem)
2543 free_pages(wavetable_mem,20-PAGE_SHIFT);
2544 printk(KERN_INFO "cmpci: unloading\n");
2545 }
2546
2547 module_init(init_cmpci);
2548 module_exit(cleanup_cmpci);