1 /* hardirq.h: 64-bit Sparc hard IRQ support. 3 * Copyright (C) 1997, 1998 David S. Miller (davem@caip.rutgers.edu) 6 #ifndef __SPARC64_HARDIRQ_H 7 #define __SPARC64_HARDIRQ_H 9 #include <linux/threads.h> 12 externunsigned int local_irq_count
; 14 #define local_irq_count (cpu_data[smp_processor_id()].irq_count) 18 * Are we in an interrupt context? Either doing bottom half 19 * or hardware interrupt processing? 21 #define in_interrupt() ((local_irq_count + local_bh_count) != 0) 25 #define hardirq_trylock(cpu) (local_irq_count == 0) 26 #define hardirq_endlock(cpu) do { } while(0) 28 #define hardirq_enter(cpu) (local_irq_count++) 29 #define hardirq_exit(cpu) (local_irq_count--) 31 #define synchronize_irq() barrier() 35 #include <asm/atomic.h> 36 #include <linux/spinlock.h> 37 #include <asm/system.h> 40 externunsigned char global_irq_holder
; 41 extern spinlock_t global_irq_lock
; 42 extern atomic_t global_irq_count
; 44 staticinlinevoidrelease_irqlock(int cpu
) 46 /* if we didn't own the irq lock, just ignore... */ 47 if(global_irq_holder
== (unsigned char) cpu
) { 48 global_irq_holder
= NO_PROC_ID
; 49 spin_unlock(&global_irq_lock
); 53 staticinlinevoidhardirq_enter(int cpu
) 55 ++(cpu_data
[cpu
].irq_count
); 56 atomic_inc(&global_irq_count
); 57 membar("#StoreLoad | #StoreStore"); 60 staticinlinevoidhardirq_exit(int cpu
) 62 membar("#StoreStore | #LoadStore"); 63 atomic_dec(&global_irq_count
); 64 --(cpu_data
[cpu
].irq_count
); 67 staticinlineinthardirq_trylock(int cpu
) 69 return(!atomic_read(&global_irq_count
) && 70 !spin_is_locked(&global_irq_lock
)); 73 #define hardirq_endlock(cpu) do { } while (0) 75 externvoidsynchronize_irq(void); 79 #endif/* !(__SPARC64_HARDIRQ_H) */