2 /*----------------------------------------------------------------------------*/ 3 /* Plug and Play header definitions */ 4 /*----------------------------------------------------------------------------*/ 6 /* Structure map for PnP on PowerPC Reference Platform */ 7 /* See Plug and Play ISA Specification, Version 1.0, May 28, 1993. It */ 8 /* (or later versions) is available on Compuserve in the PLUGPLAY area. */ 9 /* This code has extensions to that specification, namely new short and */ 10 /* long tag types for platform dependent information */ 12 /* Warning: LE notation used throughout this file */ 14 /* For enum's: if given in hex then they are bit significant, i.e. */ 15 /* only one bit is on for each enum */ 21 #define MAX_MEM_REGISTERS 9 22 #define MAX_IO_PORTS 20 24 /*#define MAX_DMA_CHANNELS 7*/ 26 /* Interrupt controllers */ 28 #define PNPinterrupt0"PNP0000"/* AT Interrupt Controller */ 29 #define PNPinterrupt1"PNP0001"/* EISA Interrupt Controller */ 30 #define PNPinterrupt2"PNP0002"/* MCA Interrupt Controller */ 31 #define PNPinterrupt3"PNP0003"/* APIC */ 32 #define PNPExtInt"IBM000D"/* PowerPC Extended Interrupt Controller */ 36 #define PNPtimer0"PNP0100"/* AT Timer */ 37 #define PNPtimer1"PNP0101"/* EISA Timer */ 38 #define PNPtimer2"PNP0102"/* MCA Timer */ 42 #define PNPdma0"PNP0200"/* AT DMA Controller */ 43 #define PNPdma1"PNP0201"/* EISA DMA Controller */ 44 #define PNPdma2"PNP0202"/* MCA DMA Controller */ 46 /* start of August 15, 1994 additions */ 48 #define PNPCMOS"IBM0009"/* CMOS */ 51 #define PNPL2"IBM0007"/* L2 Cache */ 54 #define PNPNVRAM"IBM0008"/* NVRAM */ 56 /* Power Management */ 57 #define PNPPM"IBM0005"/* Power Management */ 58 /* end of August 15, 1994 additions */ 62 #define PNPkeyboard0"PNP0300"/* IBM PC/XT KB Cntlr (83 key, no mouse) */ 63 #define PNPkeyboard1"PNP0301"/* Olivetti ICO (102 key) */ 64 #define PNPkeyboard2"PNP0302"/* IBM PC/AT KB Cntlr (84 key) */ 65 #define PNPkeyboard3"PNP0303"/* IBM Enhanced (101/2 key, PS/2 mouse) */ 66 #define PNPkeyboard4"PNP0304"/* Nokia 1050 KB Cntlr */ 67 #define PNPkeyboard5"PNP0305"/* Nokia 9140 KB Cntlr */ 68 #define PNPkeyboard6"PNP0306"/* Standard Japanese KB Cntlr */ 69 #define PNPkeyboard7"PNP0307"/* Microsoft Windows (R) KB Cntlr */ 71 /* Parallel port controllers */ 73 #define PNPparallel0"PNP0400"/* Standard LPT Parallel Port */ 74 #define PNPparallel1"PNP0401"/* ECP Parallel Port */ 75 #define PNPepp"IBM001C"/* EPP Parallel Port */ 77 /* Serial port controllers */ 79 #define PNPserial0"PNP0500"/* Standard PC Serial port */ 80 #define PNPSerial1"PNP0501"/* 16550A Compatible Serial port */ 82 /* Disk controllers */ 84 #define PNPdisk0"PNP0600"/* Generic ESDI/IDE/ATA Compat HD Cntlr */ 85 #define PNPdisk1"PNP0601"/* Plus Hardcard II */ 86 #define PNPdisk2"PNP0602"/* Plus Hardcard IIXL/EZ */ 88 /* Diskette controllers */ 90 #define PNPdiskette0"PNP0700"/* PC Standard Floppy Disk Controller */ 92 /* Display controllers */ 94 #define PNPdisplay0"PNP0900"/* VGA Compatible */ 95 #define PNPdisplay1"PNP0901"/* Video Seven VGA */ 96 #define PNPdisplay2"PNP0902"/* 8514/A Compatible */ 97 #define PNPdisplay3"PNP0903"/* Trident VGA */ 98 #define PNPdisplay4"PNP0904"/* Cirrus Logic Laptop VGA */ 99 #define PNPdisplay5"PNP0905"/* Cirrus Logic VGA */ 100 #define PNPdisplay6"PNP0906"/* Tseng ET4000 or ET4000/W32 */ 101 #define PNPdisplay7"PNP0907"/* Western Digital VGA */ 102 #define PNPdisplay8"PNP0908"/* Western Digital Laptop VGA */ 103 #define PNPdisplay9"PNP0909"/* S3 */ 104 #define PNPdisplayA"PNP090A"/* ATI Ultra Pro/Plus (Mach 32) */ 105 #define PNPdisplayB"PNP090B"/* ATI Ultra (Mach 8) */ 106 #define PNPdisplayC"PNP090C"/* XGA Compatible */ 107 #define PNPdisplayD"PNP090D"/* ATI VGA Wonder */ 108 #define PNPdisplayE"PNP090E"/* Weitek P9000 Graphics Adapter */ 109 #define PNPdisplayF"PNP090F"/* Oak Technology VGA */ 111 /* Peripheral busses */ 113 #define PNPbuses0"PNP0A00"/* ISA Bus */ 114 #define PNPbuses1"PNP0A01"/* EISA Bus */ 115 #define PNPbuses2"PNP0A02"/* MCA Bus */ 116 #define PNPbuses3"PNP0A03"/* PCI Bus */ 117 #define PNPbuses4"PNP0A04"/* VESA/VL Bus */ 119 /* RTC, BIOS, planar devices */ 121 #define PNPspeaker0"PNP0800"/* AT Style Speaker Sound */ 122 #define PNPrtc0"PNP0B00"/* AT RTC */ 123 #define PNPpnpbios0"PNP0C00"/* PNP BIOS (only created by root enum) */ 124 #define PNPpnpbios1"PNP0C01"/* System Board Memory Device */ 125 #define PNPpnpbios2"PNP0C02"/* Math Coprocessor */ 126 #define PNPpnpbios3"PNP0C03"/* PNP BIOS Event Notification Interrupt */ 128 /* PCMCIA controller */ 130 #define PNPpcmcia0"PNP0E00"/* Intel 82365 Compatible PCMCIA Cntlr */ 134 #define PNPmouse0"PNP0F00"/* Microsoft Bus Mouse */ 135 #define PNPmouse1"PNP0F01"/* Microsoft Serial Mouse */ 136 #define PNPmouse2"PNP0F02"/* Microsoft Inport Mouse */ 137 #define PNPmouse3"PNP0F03"/* Microsoft PS/2 Mouse */ 138 #define PNPmouse4"PNP0F04"/* Mousesystems Mouse */ 139 #define PNPmouse5"PNP0F05"/* Mousesystems 3 Button Mouse - COM2 */ 140 #define PNPmouse6"PNP0F06"/* Genius Mouse - COM1 */ 141 #define PNPmouse7"PNP0F07"/* Genius Mouse - COM2 */ 142 #define PNPmouse8"PNP0F08"/* Logitech Serial Mouse */ 143 #define PNPmouse9"PNP0F09"/* Microsoft Ballpoint Serial Mouse */ 144 #define PNPmouseA"PNP0F0A"/* Microsoft PNP Mouse */ 145 #define PNPmouseB"PNP0F0B"/* Microsoft PNP Ballpoint Mouse */ 149 #define PNPmodem0"PNP9000"/* Specific IDs TBD */ 151 /* Network controllers */ 153 #define PNPnetworkC9"PNP80C9"/* IBM Token Ring */ 154 #define PNPnetworkCA"PNP80CA"/* IBM Token Ring II */ 155 #define PNPnetworkCB"PNP80CB"/* IBM Token Ring II/Short */ 156 #define PNPnetworkCC"PNP80CC"/* IBM Token Ring 4/16Mbs */ 157 #define PNPnetwork27"PNP8327"/* IBM Token Ring (All types) */ 158 #define PNPnetworket"IBM0010"/* IBM Ethernet used by Power PC */ 159 #define PNPneteisaet"IBM2001"/* IBM Ethernet EISA adapter */ 160 #define PNPAMD79C970"IBM0016"/* AMD 79C970 (PCI Ethernet) */ 162 /* SCSI controllers */ 164 #define PNPscsi0"PNPA000"/* Adaptec 154x Compatible SCSI Cntlr */ 165 #define PNPscsi1"PNPA001"/* Adaptec 174x Compatible SCSI Cntlr */ 166 #define PNPscsi2"PNPA002"/* Future Domain 16-700 Compat SCSI Cntlr*/ 167 #define PNPscsi3"PNPA003"/* Panasonic CDROM Adapter (SBPro/SB16) */ 168 #define PNPscsiF"IBM000F"/* NCR 810 SCSI Controller */ 169 #define PNPscsi825"IBM001B"/* NCR 825 SCSI Controller */ 170 #define PNPscsi875"IBM0018"/* NCR 875 SCSI Controller */ 172 /* Sound/Video, Multimedia */ 174 #define PNPmm0"PNPB000"/* Sound Blaster Compatible Sound Device */ 175 #define PNPmm1"PNPB001"/* MS Windows Sound System Compat Device */ 176 #define PNPmmF"IBM000E"/* Crystal CS4231 Audio Device */ 177 #define PNPv7310"IBM0015"/* ASCII V7310 Video Capture Device */ 178 #define PNPmm4232"IBM0017"/* Crystal CS4232 Audio Device */ 179 #define PNPpmsyn"IBM001D"/* YMF 289B chip (Yamaha) */ 180 #define PNPgp4232"IBM0012"/* Crystal CS4232 Game Port */ 181 #define PNPmidi4232"IBM0013"/* Crystal CS4232 MIDI */ 184 #define PNPopctl"IBM000B"/* Operator's panel */ 186 /* Service Processor */ 187 #define PNPsp"IBM0011"/* IBM Service Processor */ 188 #define PNPLTsp"IBM001E"/* Lightning/Terlingua Support Processor */ 189 #define PNPLTmsp"IBM001F"/* Lightning/Terlingua Mini-SP */ 191 /* Memory Controller */ 192 #define PNPmemctl"IBM000A"/* Memory controller */ 194 /* Graphics Assist */ 195 #define PNPg_assist"IBM0014"/* Graphics Assist */ 197 /* Miscellaneous Device Controllers */ 198 #define PNPtablet"IBM0019"/* IBM Tablet Controller */ 200 /* PNP Packet Handles */ 202 #define S1_Packet 0x0A/* Version resource */ 203 #define S2_Packet 0x15/* Logical DEVID (without flags) */ 204 #define S2_Packet_flags 0x16/* Logical DEVID (with flags) */ 205 #define S3_Packet 0x1C/* Compatible device ID */ 206 #define S4_Packet 0x22/* IRQ resource (without flags) */ 207 #define S4_Packet_flags 0x23/* IRQ resource (with flags) */ 208 #define S5_Packet 0x2A/* DMA resource */ 209 #define S6_Packet 0x30/* Depend funct start (w/o priority) */ 210 #define S6_Packet_priority 0x31/* Depend funct start (w/ priority) */ 211 #define S7_Packet 0x38/* Depend funct end */ 212 #define S8_Packet 0x47/* I/O port resource (w/o fixed loc) */ 213 #define S9_Packet_fixed 0x4B/* I/O port resource (w/ fixed loc) */ 214 #define S14_Packet 0x71/* Vendor defined */ 215 #define S15_Packet 0x78/* End of resource (w/o checksum) */ 216 #define S15_Packet_checksum 0x79/* End of resource (w/ checksum) */ 217 #define L1_Packet 0x81/* Memory range */ 218 #define L1_Shadow 0x20/* Memory is shadowable */ 219 #define L1_32bit_mem 0x18/* 32-bit memory only */ 220 #define L1_8_16bit_mem 0x10/* 8- and 16-bit supported */ 221 #define L1_Decode_Hi 0x04/* decode supports high address */ 222 #define L1_Cache 0x02/* read cacheable, write-through */ 223 #define L1_Writeable 0x01/* Memory is writeable */ 224 #define L2_Packet 0x82/* ANSI ID string */ 225 #define L3_Packet 0x83/* Unicode ID string */ 226 #define L4_Packet 0x84/* Vendor defined */ 227 #define L5_Packet 0x85/* Large I/O */ 228 #define L6_Packet 0x86/* 32-bit Fixed Loc Mem Range Desc */ 229 #define END_TAG 0x78/* End of resource */ 230 #define DF_START_TAG 0x30/* Dependent function start */ 231 #define DF_START_TAG_priority 0x31/* Dependent function start */ 232 #define DF_END_TAG 0x38/* Dependent function end */ 233 #define SUBOPTIMAL_CONFIGURATION 0x2/* Priority byte sub optimal config */ 235 /* Device Base Type Codes */ 237 typedefenum _PnP_BASE_TYPE
{ 239 MassStorageDevice
=1, 240 NetworkInterfaceController
=2, 241 DisplayController
=3, 242 MultimediaController
=4, 245 CommunicationsDevice
=7, 248 ServiceProcessor
=0x0A,/* 11/2/95 */ 251 /* Device Sub Type Codes */ 253 typedefenum _PnP_SUB_TYPE
{ 258 OtherMassStorageController
=0x80, 260 EthernetController
=0, 261 TokenRingController
=1, 263 OtherNetworkController
=0x80, 268 OtherDisplayController
=0x80, 272 OtherMultimediaController
=0x80, 276 OtherMemoryDevice
=0x80, 278 HostProcessorBridge
=0, 281 MicroChannelBridge
=3, 285 OtherBridgeDevice
=0x80, 288 ATCompatibleParallelPort
=1, 289 OtherCommunicationsDevice
=0x80, 291 ProgrammableInterruptController
=0, 300 ServiceProcessorClass1
=9, 301 ServiceProcessorClass2
=0xA, 302 ServiceProcessorClass3
=0xB, 304 SystemPlanar
=0xF,/* 10/5/95 */ 305 OtherSystemPeripheral
=0x80, 307 KeyboardController
=0, 310 TabletController
=3,/* 10/27/95 */ 311 OtherInputController
=0x80, 313 GeneralMemoryController
=0, 316 /* Device Interface Type Codes */ 318 typedefenum _PnP_INTERFACE
{ 326 NS398_Floppy
=2,/* NS Super I/O wired to use index 327 register at port 398 and data 328 register at port 399 */ 329 NS26E_Floppy
=3,/* Ports 26E and 26F */ 330 NS15C_Floppy
=4,/* Ports 15C and 15D */ 331 NS2E_Floppy
=5,/* Ports 2E and 2F */ 332 CHRP_Floppy
=6,/* CHRP Floppy in PR*P system */ 346 CS4232Audio
=1,/* CS 4232 Plug 'n Play Configured */ 350 PCIMemoryController
=0,/* PCI Config Method */ 351 RS6KMemoryController
=1,/* RS6K Config Method */ 353 GeneralHostBridge
=0, 355 GeneralEISABridge
=0, 359 PCIBridgeIndirect
=1, 361 GeneralPCMCIABridge
=0, 368 NS398SerPort
=4,/* NS Super I/O wired to use index 369 register at port 398 and data 370 register at port 399 */ 371 NS26ESerPort
=5,/* Ports 26E and 26F */ 372 NS15CSerPort
=6,/* Ports 15C and 15D */ 373 NS2ESerPort
=7,/* Ports 2E and 2F */ 377 NS398ParPort
=2,/* NS Super I/O wired to use index 378 register at port 398 and data 379 register at port 399 */ 380 NS26EParPort
=3,/* Ports 26E and 26F */ 381 NS15CParPort
=4,/* Ports 15C and 15D */ 382 NS2EParPort
=5,/* Ports 2E and 2F */ 404 IndirectNVRAM
=0,/* Indirectly addressed */ 405 DirectNVRAM
=1,/* Memory Mapped */ 406 IndirectNVRAM24
=2,/* Indirectly addressed - 24 bit */ 408 GeneralPowerManagement
=0, 409 EPOWPowerManagement
=1, 410 PowerControl
=2,// d1378 419 ANDisplay
=5,/* AlphaNumeric Display */ 420 SystemStatusLED
=6,/* 3 digit 7 segment LED */ 421 CHRP_SystemStatusLED
=7,/* CHRP LEDs in PR*P system */ 423 GeneralServiceProcessor
=0, 429 GeneralSystemPlanar
=0,/* 10/5/95 */ 435 /* Compressed ASCII is 5 bits per char; 00001=A ... 11010=Z */ 437 typedefstruct _SERIAL_ID
{ 438 unsigned char VendorID0
;/* Bit(7)=0 */ 439 /* Bits(6:2)=1st character in */ 440 /* compressed ASCII */ 441 /* Bits(1:0)=2nd character in */ 442 /* compressed ASCII bits(4:3) */ 443 unsigned char VendorID1
;/* Bits(7:5)=2nd character in */ 444 /* compressed ASCII bits(2:0) */ 445 /* Bits(4:0)=3rd character in */ 446 /* compressed ASCII */ 447 unsigned char VendorID2
;/* Product number - vendor assigned */ 448 unsigned char VendorID3
;/* Product number - vendor assigned */ 450 /* Serial number is to provide uniqueness if more than one board of same */ 451 /* type is in system. Must be "FFFFFFFF" if feature not supported. */ 453 unsigned char Serial0
;/* Unique serial number bits (7:0) */ 454 unsigned char Serial1
;/* Unique serial number bits (15:8) */ 455 unsigned char Serial2
;/* Unique serial number bits (23:16) */ 456 unsigned char Serial3
;/* Unique serial number bits (31:24) */ 457 unsigned char Checksum
; 460 typedefenum _PnPItemName
{ 478 UnicodeIdentifier
=3, 481 MemoryRangeFixed32
=6, 484 /* Define a bunch of access functions for the bits in the tag field */ 486 /* Tag type - 0 = small; 1 = large */ 487 #define tag_type(t) (((t) & 0x80)>>7) 488 #define set_tag_type(t,v) (t = (t & 0x7f) | ((v)<<7)) 490 /* Small item name is 4 bits - one of PnPItemName enum above */ 491 #define tag_small_item_name(t) (((t) & 0x78)>>3) 492 #define set_tag_small_item_name(t,v) (t = (t & 0x07) | ((v)<<3)) 494 /* Small item count is 3 bits - count of further bytes in packet */ 495 #define tag_small_count(t) ((t) & 0x07) 496 #define set_tag_count(t,v) (t = (t & 0x78) | (v)) 498 /* Large item name is 7 bits - one of PnPItemName enum above */ 499 #define tag_large_item_name(t) ((t) & 0x7f) 500 #define set_tag_large_item_name(t,v) (t = (t | 0x80) | (v)) 502 /* a PnP resource is a bunch of contiguous TAG packets ending with an end tag */ 504 typedefunion _PnP_TAG_PACKET
{ 505 struct _S1_Pack
{/* VERSION PACKET */ 506 unsigned char Tag
;/* small tag = 0x0a */ 507 unsigned char Version
[2];/* PnP version, Vendor version */ 510 struct _S2_Pack
{/* LOGICAL DEVICE ID PACKET */ 511 unsigned char Tag
;/* small tag = 0x15 or 0x16 */ 512 unsigned char DevId
[4];/* Logical device id */ 513 unsigned char Flags
[2];/* bit(0) boot device; */ 514 /* bit(7:1) cmd in range x31-x37 */ 515 /* bit(7:0) cmd in range x28-x3f (opt)*/ 518 struct _S3_Pack
{/* COMPATIBLE DEVICE ID PACKET */ 519 unsigned char Tag
;/* small tag = 0x1c */ 520 unsigned char CompatId
[4];/* Compatible device id */ 523 struct _S4_Pack
{/* IRQ PACKET */ 524 unsigned char Tag
;/* small tag = 0x22 or 0x23 */ 525 unsigned char IRQMask
[2];/* bit(0) is IRQ0, ...; */ 526 /* bit(0) is IRQ8 ... */ 527 unsigned char IRQInfo
;/* optional; assume bit(0)=1; else */ 528 /* bit(0) - high true edge sensitive */ 529 /* bit(1) - low true edge sensitive */ 530 /* bit(2) - high true level sensitive*/ 531 /* bit(3) - low true level sensitive */ 532 /* bit(7:4) - must be 0 */ 535 struct _S5_Pack
{/* DMA PACKET */ 536 unsigned char Tag
;/* small tag = 0x2a */ 537 unsigned char DMAMask
;/* bit(0) is channel 0 ... */ 538 unsigned char DMAInfo
; 541 struct _S6_Pack
{/* START DEPENDENT FUNCTION PACKET */ 542 unsigned char Tag
;/* small tag = 0x30 or 0x31 */ 543 unsigned char Priority
;/* Optional; if missing then x01; else*/ 544 /* x00 = best possible */ 545 /* x01 = acceptible */ 546 /* x02 = sub-optimal but functional */ 549 struct _S7_Pack
{/* END DEPENDENT FUNCTION PACKET */ 550 unsigned char Tag
;/* small tag = 0x38 */ 553 struct _S8_Pack
{/* VARIABLE I/O PORT PACKET */ 554 unsigned char Tag
;/* small tag x47 */ 555 unsigned char IOInfo
;/* x0 = decode only bits(9:0); */ 556 #define ISAAddr16bit 0x01/* x01 = decode bits(15:0) */ 557 unsigned char RangeMin
[2];/* Min base address */ 558 unsigned char RangeMax
[2];/* Max base address */ 559 unsigned char IOAlign
;/* base alignmt, incr in 1B blocks */ 560 unsigned char IONum
;/* number of contiguous I/O ports */ 563 struct _S9_Pack
{/* FIXED I/O PORT PACKET */ 564 unsigned char Tag
;/* small tag = 0x4b */ 565 unsigned char Range
[2];/* base address 10 bits */ 566 unsigned char IONum
;/* number of contiguous I/O ports */ 569 struct _S14_Pack
{/* VENDOR DEFINED PACKET */ 570 unsigned char Tag
;/* small tag = 0x7m m = 1-7 */ 572 unsigned char Data
[7];/* Vendor defined */ 573 struct _S14_PPCPack
{/* Pr*p s14 pack */ 574 unsigned char Type
;/* 00=non-IBM */ 575 unsigned char PPCData
[6];/* Vendor defined */ 580 struct _S15_Pack
{/* END PACKET */ 581 unsigned char Tag
;/* small tag = 0x78 or 0x79 */ 582 unsigned char Check
;/* optional - checksum */ 585 struct _L1_Pack
{/* MEMORY RANGE PACKET */ 586 unsigned char Tag
;/* large tag = 0x81 */ 587 unsigned char Count0
;/* x09 */ 588 unsigned char Count1
;/* x00 */ 589 unsigned char Data
[9];/* a variable array of bytes, */ 593 struct _L2_Pack
{/* ANSI ID STRING PACKET */ 594 unsigned char Tag
;/* large tag = 0x82 */ 595 unsigned char Count0
;/* Length of string */ 596 unsigned char Count1
; 597 unsigned char Identifier
[1];/* a variable array of bytes, */ 601 struct _L3_Pack
{/* UNICODE ID STRING PACKET */ 602 unsigned char Tag
;/* large tag = 0x83 */ 603 unsigned char Count0
;/* Length + 2 of string */ 604 unsigned char Count1
; 605 unsigned char Country0
;/* TBD */ 606 unsigned char Country1
;/* TBD */ 607 unsigned char Identifier
[1];/* a variable array of bytes, */ 611 struct _L4_Pack
{/* VENDOR DEFINED PACKET */ 612 unsigned char Tag
;/* large tag = 0x84 */ 613 unsigned char Count0
; 614 unsigned char Count1
; 616 unsigned char Data
[1];/* a variable array of bytes, */ 618 struct _L4_PPCPack
{/* Pr*p L4 packet */ 619 unsigned char Type
;/* 00=non-IBM */ 620 unsigned char PPCData
[1];/* a variable array of bytes, */ 627 unsigned char Tag
;/* large tag = 0x85 */ 628 unsigned char Count0
;/* Count = 17 */ 629 unsigned char Count1
; 630 unsigned char Data
[17]; 634 unsigned char Tag
;/* large tag = 0x86 */ 635 unsigned char Count0
;/* Count = 9 */ 636 unsigned char Count1
; 637 unsigned char Data
[9]; 642 #endif/* __ASSEMBLY__ */ 643 #endif/* ndef _PNP_ */