drivers/scsi/cyberstorm.c

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 1 /* cyberstorm.c: Driver for CyberStorm SCSI Controller.
 2  *
 3  * Copyright (C) 1996 Jesper Skov (jskov@cygnus.co.uk)
 4  *
 5  * The CyberStorm SCSI driver is based on David S. Miller's ESP driver
 6  * for the Sparc computers.
 7  *
 8  * This work was made possible by Phase5 who willingly (and most generously)
 9  * supported me with hardware and all the information I needed.
 10  */
 11
 12 /* TODO:
 13  *
 14  * 1) Figure out how to make a cleaner merge with the sparc driver with regard
 15  * to the caches and the Sparc MMU mapping.
 16  * 2) Make as few routines required outside the generic driver. A lot of the
 17  * routines in this file used to be inline!
 18  */
 19
 20 #include <linux/module.h>
 21
 22 #include <linux/kernel.h>
 23 #include <linux/delay.h>
 24 #include <linux/types.h>
 25 #include <linux/string.h>
 26 #include <linux/malloc.h>
 27 #include <linux/blk.h>
 28 #include <linux/proc_fs.h>
 29 #include <linux/stat.h>
 30
 31 #include"scsi.h"
 32 #include"hosts.h"
 33 #include"NCR53C9x.h"
 34 #include"cyberstorm.h"
 35
 36 #include <linux/zorro.h>
 37 #include <asm/irq.h>
 38 #include <asm/amigaints.h>
 39 #include <asm/amigahw.h>
 40
 41 #include <asm/pgtable.h>
 42
 43 static intdma_bytes_sent(struct NCR_ESP *esp,int fifo_count);
 44 static intdma_can_transfer(struct NCR_ESP *esp, Scsi_Cmnd *sp);
 45 static voiddma_dump_state(struct NCR_ESP *esp);
 46 static voiddma_init_read(struct NCR_ESP *esp, __u32 addr,int length);
 47 static voiddma_init_write(struct NCR_ESP *esp, __u32 addr,int length);
 48 static voiddma_ints_off(struct NCR_ESP *esp);
 49 static voiddma_ints_on(struct NCR_ESP *esp);
 50 static intdma_irq_p(struct NCR_ESP *esp);
 51 static voiddma_led_off(struct NCR_ESP *esp);
 52 static voiddma_led_on(struct NCR_ESP *esp);
 53 static intdma_ports_p(struct NCR_ESP *esp);
 54 static voiddma_setup(struct NCR_ESP *esp, __u32 addr,int count,int write);
 55
 56 static unsigned char ctrl_data =0;/* Keep backup of the stuff written
 57  * to ctrl_reg. Always write a copy
 58  * to this register when writing to
 59  * the hardware register!
 60  */
 61
 62 volatileunsigned char cmd_buffer[16];
 63 /* This is where all commands are put
 64  * before they are transfered to the ESP chip
 65  * via PIO.
 66  */
 67
 68 /***************************************************************** Detection */
 69 int __init cyber_esp_detect(Scsi_Host_Template *tpnt)
 70 {
 71 struct NCR_ESP *esp;
 72 const struct ConfigDev *esp_dev;
 73 unsigned int key;
 74 unsigned long address;
 75
 76
 77 if((key =zorro_find(ZORRO_PROD_PHASE5_BLIZZARD_1220_CYBERSTORM,0,0)) ||
 78 (key =zorro_find(ZORRO_PROD_PHASE5_BLIZZARD_1230_II_FASTLANE_Z3_CYBERSCSI_CYBERSTORM060,0,0))){
 79  esp_dev =zorro_get_board(key);
 80
 81 /* Figure out if this is a CyberStorm or really a
 82  * Fastlane/Blizzard Mk II by looking at the board size.
 83  * CyberStorm maps 64kB
 84  * (ZORRO_PROD_PHASE5_BLIZZARD_1220_CYBERSTORM does anyway)
 85  */
 86 if((unsigned long)esp_dev->cd_BoardSize !=0x10000)
 87 return0;
 88
 89  esp =esp_allocate(tpnt, (void*) esp_dev);
 90
 91 /* Do command transfer with programmed I/O */
 92  esp->do_pio_cmds =1;
 93
 94 /* Required functions */
 95  esp->dma_bytes_sent = &dma_bytes_sent;
 96  esp->dma_can_transfer = &dma_can_transfer;
 97  esp->dma_dump_state = &dma_dump_state;
 98  esp->dma_init_read = &dma_init_read;
 99  esp->dma_init_write = &dma_init_write;
 100  esp->dma_ints_off = &dma_ints_off;
 101  esp->dma_ints_on = &dma_ints_on;
 102  esp->dma_irq_p = &dma_irq_p;
 103  esp->dma_ports_p = &dma_ports_p;
 104  esp->dma_setup = &dma_setup;
 105
 106 /* Optional functions */
 107  esp->dma_barrier =0;
 108  esp->dma_drain =0;
 109  esp->dma_invalidate =0;
 110  esp->dma_irq_entry =0;
 111  esp->dma_irq_exit =0;
 112  esp->dma_led_on = &dma_led_on;
 113  esp->dma_led_off = &dma_led_off;
 114  esp->dma_poll =0;
 115  esp->dma_reset =0;
 116
 117 /* SCSI chip speed */
 118  esp->cfreq =40000000;
 119
 120 /* The DMA registers on the CyberStorm are mapped
 121  * relative to the device (i.e. in the same Zorro
 122  * I/O block).
 123  */
 124  address = (unsigned long)ZTWO_VADDR(esp_dev->cd_BoardAddr);
 125  esp->dregs = (void*)(address + CYBER_DMA_ADDR);
 126
 127 /* ESP register base */
 128  esp->eregs = (struct ESP_regs *)(address + CYBER_ESP_ADDR);
 129
 130 /* Set the command buffer */
 131  esp->esp_command = (volatileunsigned char*) cmd_buffer;
 132  esp->esp_command_dvma =virt_to_bus(cmd_buffer);
 133
 134  esp->irq = IRQ_AMIGA_PORTS;
 135  esp->slot = key;
 136 request_irq(IRQ_AMIGA_PORTS, esp_intr, SA_SHIRQ,
 137 "CyberStorm SCSI", esp_intr);
 138 /* Figure out our scsi ID on the bus */
 139 /* The DMA cond flag contains a hardcoded jumper bit
 140  * which can be used to select host number 6 or 7.
 141  * However, even though it may change, we use a hardcoded
 142  * value of 7.
 143  */
 144  esp->scsi_id =7;
 145
 146 /* We don't have a differential SCSI-bus. */
 147  esp->diff =0;
 148
 149 esp_initialize(esp);
 150
 151 zorro_config_board(key,0);
 152
 153 printk("ESP: Total of %d ESP hosts found, %d actually in use.\n", nesps, esps_in_use);
 154  esps_running = esps_in_use;
 155 return esps_in_use;
 156 }
 157 return0;
 158 }
 159
 160 /************************************************************* DMA Functions */
 161 static intdma_bytes_sent(struct NCR_ESP *esp,int fifo_count)
 162 {
 163 /* Since the CyberStorm DMA is fully dedicated to the ESP chip,
 164  * the number of bytes sent (to the ESP chip) equals the number
 165  * of bytes in the FIFO - there is no buffering in the DMA controller.
 166  * XXXX Do I read this right? It is from host to ESP, right?
 167  */
 168 return fifo_count;
 169 }
 170
 171 static intdma_can_transfer(struct NCR_ESP *esp, Scsi_Cmnd *sp)
 172 {
 173 /* I don't think there's any limit on the CyberDMA. So we use what
 174  * the ESP chip can handle (24 bit).
 175  */
 176 unsigned long sz = sp->SCp.this_residual;
 177 if(sz >0x1000000)
 178  sz =0x1000000;
 179 return sz;
 180 }
 181
 182 static voiddma_dump_state(struct NCR_ESP *esp)
 183 {
 184 ESPLOG(("esp%d: dma -- cond_reg<%02x>\n",
 185  esp->esp_id, ((struct cyber_dma_registers *)
 186 (esp->dregs))->cond_reg));
 187 ESPLOG(("intreq:<%04x>, intena:<%04x>\n",
 188  custom.intreqr, custom.intenar));
 189 }
 190
 191 static voiddma_init_read(struct NCR_ESP *esp, __u32 addr,int length)
 192 {
 193 struct cyber_dma_registers *dregs =
 194 (struct cyber_dma_registers *) esp->dregs;
 195
 196 cache_clear(addr, length);
 197
 198  addr &= ~(1);
 199  dregs->dma_addr0 = (addr >>24) &0xff;
 200  dregs->dma_addr1 = (addr >>16) &0xff;
 201  dregs->dma_addr2 = (addr >>8) &0xff;
 202  dregs->dma_addr3 = (addr ) &0xff;
 203  ctrl_data &= ~(CYBER_DMA_WRITE);
 204
 205 /* Check if physical address is outside Z2 space and of
 206  * block length/block aligned in memory. If this is the
 207  * case, enable 32 bit transfer. In all other cases, fall back
 208  * to 16 bit transfer.
 209  * Obviously 32 bit transfer should be enabled if the DMA address
 210  * and length are 32 bit aligned. However, this leads to some
 211  * strange behavior. Even 64 bit aligned addr/length fails.
 212  * Until I've found a reason for this, 32 bit transfer is only
 213  * used for full-block transfers (1kB).
 214  * -jskov
 215  */
 216 #if 0
 217 if((addr &0x3fc) || length &0x3ff|| ((addr >0x200000) &&
 218 (addr <0xff0000)))
 219  ctrl_data &= ~(CYBER_DMA_Z3);/* Z2, do 16 bit DMA */
 220 else
 221  ctrl_data |= CYBER_DMA_Z3;/* CHIP/Z3, do 32 bit DMA */
 222 #else
 223  ctrl_data &= ~(CYBER_DMA_Z3);/* Z2, do 16 bit DMA */
 224 #endif
 225  dregs->ctrl_reg = ctrl_data;
 226 }
 227
 228 static voiddma_init_write(struct NCR_ESP *esp, __u32 addr,int length)
 229 {
 230 struct cyber_dma_registers *dregs =
 231 (struct cyber_dma_registers *) esp->dregs;
 232
 233 cache_push(addr, length);
 234
 235  addr |=1;
 236  dregs->dma_addr0 = (addr >>24) &0xff;
 237  dregs->dma_addr1 = (addr >>16) &0xff;
 238  dregs->dma_addr2 = (addr >>8) &0xff;
 239  dregs->dma_addr3 = (addr ) &0xff;
 240  ctrl_data |= CYBER_DMA_WRITE;
 241
 242 /* See comment above */
 243 #if 0
 244 if((addr &0x3fc) || length &0x3ff|| ((addr >0x200000) &&
 245 (addr <0xff0000)))
 246  ctrl_data &= ~(CYBER_DMA_Z3);/* Z2, do 16 bit DMA */
 247 else
 248  ctrl_data |= CYBER_DMA_Z3;/* CHIP/Z3, do 32 bit DMA */
 249 #else
 250  ctrl_data &= ~(CYBER_DMA_Z3);/* Z2, do 16 bit DMA */
 251 #endif
 252  dregs->ctrl_reg = ctrl_data;
 253 }
 254
 255 static voiddma_ints_off(struct NCR_ESP *esp)
 256 {
 257 disable_irq(esp->irq);
 258 }
 259
 260 static voiddma_ints_on(struct NCR_ESP *esp)
 261 {
 262 enable_irq(esp->irq);
 263 }
 264
 265 static intdma_irq_p(struct NCR_ESP *esp)
 266 {
 267 /* It's important to check the DMA IRQ bit in the correct way! */
 268 return((esp_read(esp->eregs->esp_status) & ESP_STAT_INTR) &&
 269 ((((struct cyber_dma_registers *)(esp->dregs))->cond_reg) &
 270  CYBER_DMA_HNDL_INTR));
 271 }
 272
 273 static voiddma_led_off(struct NCR_ESP *esp)
 274 {
 275  ctrl_data &= ~CYBER_DMA_LED;
 276 ((struct cyber_dma_registers *)(esp->dregs))->ctrl_reg = ctrl_data;
 277 }
 278
 279 static voiddma_led_on(struct NCR_ESP *esp)
 280 {
 281  ctrl_data |= CYBER_DMA_LED;
 282 ((struct cyber_dma_registers *)(esp->dregs))->ctrl_reg = ctrl_data;
 283 }
 284
 285 static intdma_ports_p(struct NCR_ESP *esp)
 286 {
 287 return((custom.intenar) & IF_PORTS);
 288 }
 289
 290 static voiddma_setup(struct NCR_ESP *esp, __u32 addr,int count,int write)
 291 {
 292 /* On the Sparc, DMA_ST_WRITE means "move data from device to memory"
 293  * so when (write) is true, it actually means READ!
 294  */
 295 if(write){
 296 dma_init_read(esp, addr, count);
 297 }else{
 298 dma_init_write(esp, addr, count);
 299 }
 300 }
 301
 302 #ifdef MODULE
 303
 304 #define HOSTS_C
 305
 306 #include"cyberstorm.h"
 307
 308 Scsi_Host_Template driver_template = SCSI_CYBERSTORM;
 309
 310 #include"scsi_module.c"
 311
 312 #endif
 313
 314 intcyber_esp_release(struct Scsi_Host *instance)
 315 {
 316 #ifdef MODULE
 317 unsigned int key;
 318
 319  key = ((struct NCR_ESP *)instance->hostdata)->slot;
 320 esp_deallocate((struct NCR_ESP *)instance->hostdata);
 321 esp_release();
 322 zorro_unconfig_board(key,0);
 323 free_irq(IRQ_AMIGA_PORTS, esp_intr);
 324 #endif
 325 return1;
 326 }