codegenlinear.cpp

// Licensed to the .NET Foundation under one or more agreements.
// The .NET Foundation licenses this file to you under the MIT license.
// See the LICENSE file in the project root for more information.

/*XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
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XX XX
XX Code Generation Support Methods for Linear Codegen XX
XX XX
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XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
*/
#include"jitpch.h"
#ifdef _MSC_VER
#pragma hdrstop
#endif

#include"emit.h"
#include"codegen.h"

//------------------------------------------------------------------------
// genInitializeRegisterState: Initialize the register state contained in 'regSet'.
//
// Assumptions:
// On exit the "rsModifiedRegsMask" (in "regSet") holds all the registers' masks hosting an argument on the function
// and elements of "rsSpillDesc" (in "regSet") are setted to nullptr.
//
// Notes:
// This method is intended to be called only from initializeStructuresBeforeBlockCodeGeneration.
voidCodeGen::genInitializeRegisterState()
{
// Initialize the spill tracking logic

 regSet.rsSpillBeg();

// If any arguments live in registers, mark those regs as such

unsigned varNum;
 LclVarDsc* varDsc;

for (varNum = 0, varDsc = compiler->lvaTable; varNum < compiler->lvaCount; varNum++, varDsc++)
 {
// Is this variable a parameter assigned to a register?
if (!varDsc->lvIsParam || !varDsc->lvRegister)
 {
continue;
 }

// Is the argument live on entry to the method?
if (!VarSetOps::IsMember(compiler, compiler->fgFirstBB->bbLiveIn, varDsc->lvVarIndex))
 {
continue;
 }

// Is this a floating-point argument?
if (varDsc->IsFloatRegType())
 {
continue;
 }

noway_assert(!varTypeIsFloating(varDsc->TypeGet()));

// Mark the register as holding the variable
assert(varDsc->GetRegNum() != REG_STK);
if (!varDsc->lvAddrExposed)
 {
 regSet.verifyRegUsed(varDsc->GetRegNum());
 }
 }
}

//------------------------------------------------------------------------
// genInitialize: Initialize Scopes, registers, gcInfo and current liveness variables structures
// used in the generation of blocks' code before.
//
// Assumptions:
// -The pointer logic in "gcInfo" for pointers on registers and variable is cleaned.
// -"compiler->compCurLife" becomes an empty set
// -"compiler->compCurLife" are set to be a clean set
// -If there is local var info siScopes scope logic in codegen is initialized in "siInit()"
//
// Notes:
// This method is intended to be called when code generation for blocks happens, and before the list of blocks is
// iterated.
voidCodeGen::genInitialize()
{
// Initialize the line# tracking logic
if (compiler->opts.compScopeInfo)
 {
siInit();
 }

#ifdef USING_VARIABLE_LIVE_RANGE
initializeVariableLiveKeeper();
#endif// USING_VARIABLE_LIVE_RANGE

// The current implementation of switch tables requires the first block to have a label so it
// can generate offsets to the switch label targets.
// TODO-CQ: remove this when switches have been re-implemented to not use this.
if (compiler->fgHasSwitch)
 {
 compiler->fgFirstBB->bbFlags |= BBF_JMP_TARGET;
 }

 genPendingCallLabel = nullptr;

// Initialize the pointer tracking code

 gcInfo.gcRegPtrSetInit();
 gcInfo.gcVarPtrSetInit();

// Initialize the register set logic

genInitializeRegisterState();

// Make sure a set is allocated for compiler->compCurLife (in the long case), so we can set it to empty without
// allocation at the start of each basic block.
VarSetOps::AssignNoCopy(compiler, compiler->compCurLife, VarSetOps::MakeEmpty(compiler));

// We initialize the stack level before first "BasicBlock" code is generated in case we need to report stack
// variable needs home and so its stack offset.
SetStackLevel(0);
}

//------------------------------------------------------------------------
// genCodeForBBlist: Generate code for all the blocks in a method
//
// Arguments:
// None
//
// Notes:
// This is the main method for linear codegen. It calls genCodeForTreeNode
// to generate the code for each node in each BasicBlock, and handles BasicBlock
// boundaries and branches.
//
voidCodeGen::genCodeForBBlist()
{
unsigned savedStkLvl;

#ifdef DEBUG
 genInterruptibleUsed = true;

// You have to be careful if you create basic blocks from now on
 compiler->fgSafeBasicBlockCreation = false;
#endif// DEBUG

#if defined(DEBUG) && defined(_TARGET_X86_)

// Check stack pointer on call stress mode is not compatible with fully interruptible GC. REVIEW: why?
//
if (GetInterruptible() && compiler->opts.compStackCheckOnCall)
 {
 compiler->opts.compStackCheckOnCall = false;
 }

#endif// defined(DEBUG) && defined(_TARGET_X86_)

#if defined(DEBUG) && defined(_TARGET_XARCH_)

// Check stack pointer on return stress mode is not compatible with fully interruptible GC. REVIEW: why?
// It is also not compatible with any function that makes a tailcall: we aren't smart enough to only
// insert the SP check in the non-tailcall returns.
//
if ((GetInterruptible() || compiler->compTailCallUsed) && compiler->opts.compStackCheckOnRet)
 {
 compiler->opts.compStackCheckOnRet = false;
 }

#endif// defined(DEBUG) && defined(_TARGET_XARCH_)

// Prepare the blocks for exception handling codegen: mark the blocks that needs labels.
genPrepForEHCodegen();

assert(!compiler->fgFirstBBScratch ||
 compiler->fgFirstBB == compiler->fgFirstBBScratch); // compiler->fgFirstBBScratch has to be first.

/* Initialize structures used in the block list iteration */
genInitialize();

/*-------------------------------------------------------------------------
 *
 * Walk the basic blocks and generate code for each one
 *
*/

 BasicBlock* block;

for (block = compiler->fgFirstBB; block != nullptr; block = block->bbNext)
 {
#ifdef DEBUG
if (compiler->verbose)
 {
printf("\n=============== Generating ");
 block->dspBlockHeader(compiler, true, true);
 compiler->fgDispBBLiveness(block);
 }
#endif// DEBUG

assert(LIR::AsRange(block).CheckLIR(compiler));

// Figure out which registers hold variables on entry to this block

 regSet.ClearMaskVars();
 gcInfo.gcRegGCrefSetCur = RBM_NONE;
 gcInfo.gcRegByrefSetCur = RBM_NONE;

 compiler->m_pLinearScan->recordVarLocationsAtStartOfBB(block);

// Updating variable liveness after last instruction of previous block was emitted
// and before first of the current block is emitted
genUpdateLife(block->bbLiveIn);

// Even if liveness didn't change, we need to update the registers containing GC references.
// genUpdateLife will update the registers live due to liveness changes. But what about registers that didn't
// change? We cleared them out above. Maybe we should just not clear them out, but update the ones that change
// here. That would require handling the changes in recordVarLocationsAtStartOfBB().

 regMaskTP newLiveRegSet = RBM_NONE;
 regMaskTP newRegGCrefSet = RBM_NONE;
 regMaskTP newRegByrefSet = RBM_NONE;
#ifdef DEBUG
 VARSET_TP removedGCVars(VarSetOps::MakeEmpty(compiler));
 VARSET_TP addedGCVars(VarSetOps::MakeEmpty(compiler));
#endif
 VarSetOps::Iter iter(compiler, block->bbLiveIn);
unsigned varIndex = 0;
while (iter.NextElem(&varIndex))
 {
 LclVarDsc* varDsc = compiler->lvaGetDescByTrackedIndex(varIndex);

if (varDsc->lvIsInReg())
 {
 newLiveRegSet |= varDsc->lvRegMask();
if (varDsc->lvType == TYP_REF)
 {
 newRegGCrefSet |= varDsc->lvRegMask();
 }
elseif (varDsc->lvType == TYP_BYREF)
 {
 newRegByrefSet |= varDsc->lvRegMask();
 }
#ifdef DEBUG
if (verbose && VarSetOps::IsMember(compiler, gcInfo.gcVarPtrSetCur, varIndex))
 {
VarSetOps::AddElemD(compiler, removedGCVars, varIndex);
 }
#endif// DEBUG
VarSetOps::RemoveElemD(compiler, gcInfo.gcVarPtrSetCur, varIndex);
 }
elseif (compiler->lvaIsGCTracked(varDsc))
 {
#ifdef DEBUG
if (verbose && !VarSetOps::IsMember(compiler, gcInfo.gcVarPtrSetCur, varIndex))
 {
VarSetOps::AddElemD(compiler, addedGCVars, varIndex);
 }
#endif// DEBUG
VarSetOps::AddElemD(compiler, gcInfo.gcVarPtrSetCur, varIndex);
 }
 }

 regSet.SetMaskVars(newLiveRegSet);

#ifdef DEBUG
if (compiler->verbose)
 {
if (!VarSetOps::IsEmpty(compiler, addedGCVars))
 {
printf("\t\t\t\t\t\t\tAdded GCVars: ");
dumpConvertedVarSet(compiler, addedGCVars);
printf("\n");
 }
if (!VarSetOps::IsEmpty(compiler, removedGCVars))
 {
printf("\t\t\t\t\t\t\tRemoved GCVars: ");
dumpConvertedVarSet(compiler, removedGCVars);
printf("\n");
 }
 }
#endif// DEBUG

 gcInfo.gcMarkRegSetGCref(newRegGCrefSet DEBUGARG(true));
 gcInfo.gcMarkRegSetByref(newRegByrefSet DEBUGARG(true));

/* Blocks with handlerGetsXcptnObj()==true use GT_CATCH_ARG to
 represent the exception object (TYP_REF).
 We mark REG_EXCEPTION_OBJECT as holding a GC object on entry
 to the block, it will be the first thing evaluated
 (thanks to GTF_ORDER_SIDEEFF).
*/

if (handlerGetsXcptnObj(block->bbCatchTyp))
 {
for (GenTree* node : LIR::AsRange(block))
 {
if (node->OperGet() == GT_CATCH_ARG)
 {
 gcInfo.gcMarkRegSetGCref(RBM_EXCEPTION_OBJECT);
break;
 }
 }
 }

#if defined(FEATURE_EH_FUNCLETS) && defined(_TARGET_ARM_)
genInsertNopForUnwinder(block);
#endif

/* Start a new code output block */

genUpdateCurrentFunclet(block);

#ifdef _TARGET_XARCH_
if (ShouldAlignLoops() && block->bbFlags & BBF_LOOP_HEAD)
 {
GetEmitter()->emitLoopAlign();
 }
#endif

genLogLabel(block);

// Tell everyone which basic block we're working on

 compiler->compCurBB = block;

 block->bbEmitCookie = nullptr;

// If this block is a jump target or it requires a label then set 'needLabel' to true,
//
bool needLabel = (block->bbFlags & (BBF_JMP_TARGET | BBF_HAS_LABEL)) != 0;

if (block == compiler->fgFirstColdBlock)
 {
#ifdef DEBUG
if (compiler->verbose)
 {
printf("\nThis is the start of the cold region of the method\n");
 }
#endif
// We should never have a block that falls through into the Cold section
noway_assert(!block->bbPrev->bbFallsThrough());

 needLabel = true;
 }

#if defined(DEBUG) || defined(LATE_DISASM)
// We also want to start a new Instruction group by calling emitAddLabel below,
// when we need accurate bbWeights for this block in the emitter. We force this
// whenever our previous block was a BBJ_COND and it has a different weight than us.
//
// Note: We need to have set compCurBB before calling emitAddLabel
//
if ((block->bbPrev != nullptr) && (block->bbPrev->bbJumpKind == BBJ_COND) &&
 (block->bbWeight != block->bbPrev->bbWeight))
 {
 needLabel = true;
 }
#endif// DEBUG || LATE_DISASM

if (needLabel)
 {
// Mark a label and update the current set of live GC refs

 block->bbEmitCookie = GetEmitter()->emitAddLabel(gcInfo.gcVarPtrSetCur, gcInfo.gcRegGCrefSetCur,
 gcInfo.gcRegByrefSetCur, FALSE);
 }

if (block == compiler->fgFirstColdBlock)
 {
// We require the block that starts the Cold section to have a label
noway_assert(block->bbEmitCookie);
GetEmitter()->emitSetFirstColdIGCookie(block->bbEmitCookie);
 }

/* Both stacks are always empty on entry to a basic block */

SetStackLevel(0);
genAdjustStackLevel(block);
 savedStkLvl = genStackLevel;

// Needed when jitting debug code
siBeginBlock(block);

// BBF_INTERNAL blocks don't correspond to any single IL instruction.
if (compiler->opts.compDbgInfo && (block->bbFlags & BBF_INTERNAL) &&
 !compiler->fgBBisScratch(block)) // If the block is the distinguished first scratch block, then no need to
// emit a NO_MAPPING entry, immediately after the prolog.
 {
genIPmappingAdd((IL_OFFSETX)ICorDebugInfo::NO_MAPPING, true);
 }

bool firstMapping = true;

#if defined(FEATURE_EH_FUNCLETS)
if (block->bbFlags & BBF_FUNCLET_BEG)
 {
genReserveFuncletProlog(block);
 }
#endif// FEATURE_EH_FUNCLETS

// Clear compCurStmt and compCurLifeTree.
 compiler->compCurStmt = nullptr;
 compiler->compCurLifeTree = nullptr;

// Traverse the block in linear order, generating code for each node as we
// as we encounter it.
 CLANG_FORMAT_COMMENT_ANCHOR;

#ifdef DEBUG
// Set the use-order numbers for each node.
 {
int useNum = 0;
for (GenTree* node : LIR::AsRange(block).NonPhiNodes())
 {
assert((node->gtDebugFlags & GTF_DEBUG_NODE_CG_CONSUMED) == 0);

 node->gtUseNum = -1;
if (node->isContained() || node->IsCopyOrReload())
 {
continue;
 }

for (GenTree* operand : node->Operands())
 {
genNumberOperandUse(operand, useNum);
 }
 }
 }
#endif// DEBUG

 IL_OFFSETX currentILOffset = BAD_IL_OFFSET;
for (GenTree* node : LIR::AsRange(block).NonPhiNodes())
 {
// Do we have a new IL offset?
if (node->OperGet() == GT_IL_OFFSET)
 {
 GenTreeILOffset* ilOffset = node->AsILOffset();
genEnsureCodeEmitted(currentILOffset);
 currentILOffset = ilOffset->gtStmtILoffsx;
genIPmappingAdd(currentILOffset, firstMapping);
 firstMapping = false;
#ifdef DEBUG
assert(ilOffset->gtStmtLastILoffs <= compiler->info.compILCodeSize ||
 ilOffset->gtStmtLastILoffs == BAD_IL_OFFSET);

if (compiler->opts.dspCode && compiler->opts.dspInstrs && ilOffset->gtStmtLastILoffs != BAD_IL_OFFSET)
 {
while (genCurDispOffset <= ilOffset->gtStmtLastILoffs)
 {
 genCurDispOffset += dumpSingleInstr(compiler->info.compCode, genCurDispOffset, "> ");
 }
 }

#endif// DEBUG
 }

genCodeForTreeNode(node);
if (node->gtHasReg() && node->IsUnusedValue())
 {
genConsumeReg(node);
 }
 } // end for each node in block

#ifdef DEBUG
// The following set of register spill checks and GC pointer tracking checks used to be
// performed at statement boundaries. Now, with LIR, there are no statements, so they are
// performed at the end of each block.
// TODO: could these checks be performed more frequently? E.g., at each location where
// the register allocator says there are no live non-variable registers. Perhaps this could
// be done by using the map maintained by LSRA (operandToLocationInfoMap) to mark a node
// somehow when, after the execution of that node, there will be no live non-variable registers.

 regSet.rsSpillChk();

/* Make sure we didn't bungle pointer register tracking */

 regMaskTP ptrRegs = gcInfo.gcRegGCrefSetCur | gcInfo.gcRegByrefSetCur;
 regMaskTP nonVarPtrRegs = ptrRegs & ~regSet.GetMaskVars();

// If return is a GC-type, clear it. Note that if a common
// epilog is generated (genReturnBB) it has a void return
// even though we might return a ref. We can't use the compRetType
// as the determiner because something we are tracking as a byref
// might be used as a return value of a int function (which is legal)
 GenTree* blockLastNode = block->lastNode();
if ((blockLastNode != nullptr) && (blockLastNode->gtOper == GT_RETURN) &&
 (varTypeIsGC(compiler->info.compRetType) ||
 (blockLastNode->AsOp()->gtOp1 != nullptr && varTypeIsGC(blockLastNode->AsOp()->gtOp1->TypeGet()))))
 {
 nonVarPtrRegs &= ~RBM_INTRET;
 }

if (nonVarPtrRegs)
 {
printf("Regset after " FMT_BB " gcr=", block->bbNum);
printRegMaskInt(gcInfo.gcRegGCrefSetCur & ~regSet.GetMaskVars());
 compiler->GetEmitter()->emitDispRegSet(gcInfo.gcRegGCrefSetCur & ~regSet.GetMaskVars());
printf(", byr=");
printRegMaskInt(gcInfo.gcRegByrefSetCur & ~regSet.GetMaskVars());
 compiler->GetEmitter()->emitDispRegSet(gcInfo.gcRegByrefSetCur & ~regSet.GetMaskVars());
printf(", regVars=");
printRegMaskInt(regSet.GetMaskVars());
 compiler->GetEmitter()->emitDispRegSet(regSet.GetMaskVars());
printf("\n");
 }

noway_assert(nonVarPtrRegs == RBM_NONE);
#endif// DEBUG

#if defined(DEBUG)
if (block->bbNext == nullptr)
 {
// Unit testing of the emitter: generate a bunch of instructions into the last block
// (it's as good as any, but better than the prologue, which can only be a single instruction
// group) then use COMPlus_JitLateDisasm=* to see if the late disassembler
// thinks the instructions are the same as we do.
#if defined(_TARGET_AMD64_) && defined(LATE_DISASM)
genAmd64EmitterUnitTests();
#elif defined(_TARGET_ARM64_)
genArm64EmitterUnitTests();
#endif// _TARGET_ARM64_
 }
#endif// defined(DEBUG)

// It is possible to reach the end of the block without generating code for the current IL offset.
// For example, if the following IR ends the current block, no code will have been generated for
// offset 21:
//
// ( 0, 0) [000040] ------------ il_offset void IL offset: 21
//
// N001 ( 0, 0) [000039] ------------ nop void
//
// This can lead to problems when debugging the generated code. To prevent these issues, make sure
// we've generated code for the last IL offset we saw in the block.
genEnsureCodeEmitted(currentILOffset);

/* Is this the last block, and are there any open scopes left ? */

bool isLastBlockProcessed = (block->bbNext == nullptr);
if (block->isBBCallAlwaysPair())
 {
 isLastBlockProcessed = (block->bbNext->bbNext == nullptr);
 }

#ifdef USING_VARIABLE_LIVE_RANGE
if (compiler->opts.compDbgInfo && isLastBlockProcessed)
 {
 varLiveKeeper->siEndAllVariableLiveRange(compiler->compCurLife);
 }
#endif// USING_VARIABLE_LIVE_RANGE

if (compiler->opts.compScopeInfo && (compiler->info.compVarScopesCount > 0))
 {
siEndBlock(block);

#ifdef USING_SCOPE_INFO
if (isLastBlockProcessed && siOpenScopeList.scNext)
 {
/* This assert no longer holds, because we may insert a throw
 block to demarcate the end of a try or finally region when they
 are at the end of the method. It would be nice if we could fix
 our code so that this throw block will no longer be necessary. */

// noway_assert(block->bbCodeOffsEnd != compiler->info.compILCodeSize);

siCloseAllOpenScopes();
 }
#endif// USING_SCOPE_INFO
 }

SubtractStackLevel(savedStkLvl);

#ifdef DEBUG
// compCurLife should be equal to the liveOut set, except that we don't keep
// it up to date for vars that are not register candidates
// (it would be nice to have a xor set function)

 VARSET_TP mismatchLiveVars(VarSetOps::Diff(compiler, block->bbLiveOut, compiler->compCurLife));
VarSetOps::UnionD(compiler, mismatchLiveVars,
VarSetOps::Diff(compiler, compiler->compCurLife, block->bbLiveOut));
 VarSetOps::Iter mismatchLiveVarIter(compiler, mismatchLiveVars);
unsigned mismatchLiveVarIndex = 0;
bool foundMismatchedRegVar = false;
while (mismatchLiveVarIter.NextElem(&mismatchLiveVarIndex))
 {
 LclVarDsc* varDsc = compiler->lvaGetDescByTrackedIndex(mismatchLiveVarIndex);
if (varDsc->lvIsRegCandidate())
 {
if (!foundMismatchedRegVar)
 {
JITDUMP("Mismatched live reg vars after BB%02u:", block->bbNum);
 foundMismatchedRegVar = true;
 }
JITDUMP(" V%02u", compiler->lvaTrackedIndexToLclNum(mismatchLiveVarIndex));
 }
 }
if (foundMismatchedRegVar)
 {
JITDUMP("\n");
assert(!"Found mismatched live reg var(s) after block");
 }
#endif

/* Both stacks should always be empty on exit from a basic block */
noway_assert(genStackLevel == 0);

#ifdef _TARGET_AMD64_
// On AMD64, we need to generate a NOP after a call that is the last instruction of the block, in several
// situations, to support proper exception handling semantics. This is mostly to ensure that when the stack
// walker computes an instruction pointer for a frame, that instruction pointer is in the correct EH region.
// The document "X64 and ARM ABIs.docx" has more details. The situations:
// 1. If the call instruction is in a different EH region as the instruction that follows it.
// 2. If the call immediately precedes an OS epilog. (Note that what the JIT or VM consider an epilog might
// be slightly different from what the OS considers an epilog, and it is the OS-reported epilog that matters
// here.)
// We handle case #1 here, and case #2 in the emitter.
if (GetEmitter()->emitIsLastInsCall())
 {
// Ok, the last instruction generated is a call instruction. Do any of the other conditions hold?
// Note: we may be generating a few too many NOPs for the case of call preceding an epilog. Technically,
// if the next block is a BBJ_RETURN, an epilog will be generated, but there may be some instructions
// generated before the OS epilog starts, such as a GS cookie check.
if ((block->bbNext == nullptr) || !BasicBlock::sameEHRegion(block, block->bbNext))
 {
// We only need the NOP if we're not going to generate any more code as part of the block end.

switch (block->bbJumpKind)
 {
case BBJ_ALWAYS:
case BBJ_THROW:
case BBJ_CALLFINALLY:
case BBJ_EHCATCHRET:
// We're going to generate more code below anyway, so no need for the NOP.

case BBJ_RETURN:
case BBJ_EHFINALLYRET:
case BBJ_EHFILTERRET:
// These are the "epilog follows" case, handled in the emitter.

break;

case BBJ_NONE:
if (block->bbNext == nullptr)
 {
// Call immediately before the end of the code; we should never get here .
instGen(INS_BREAKPOINT); // This should never get executed
 }
else
 {
// We need the NOP
instGen(INS_nop);
 }
break;

case BBJ_COND:
case BBJ_SWITCH:
// These can't have a call as the last instruction!

default:
noway_assert(!"Unexpected bbJumpKind");
break;
 }
 }
 }
#endif// _TARGET_AMD64_

/* Do we need to generate a jump or return? */

switch (block->bbJumpKind)
 {
case BBJ_ALWAYS:
inst_JMP(EJ_jmp, block->bbJumpDest);
break;

case BBJ_RETURN:
genExitCode(block);
break;

case BBJ_THROW:
// If we have a throw at the end of a function or funclet, we need to emit another instruction
// afterwards to help the OS unwinder determine the correct context during unwind.
// We insert an unexecuted breakpoint instruction in several situations
// following a throw instruction:
// 1. If the throw is the last instruction of the function or funclet. This helps
// the OS unwinder determine the correct context during an unwind from the
// thrown exception.
// 2. If this is this is the last block of the hot section.
// 3. If the subsequent block is a special throw block.
// 4. On AMD64, if the next block is in a different EH region.
if ((block->bbNext == nullptr) || (block->bbNext->bbFlags & BBF_FUNCLET_BEG) ||
 !BasicBlock::sameEHRegion(block, block->bbNext) ||
 (!isFramePointerUsed() && compiler->fgIsThrowHlpBlk(block->bbNext)) ||
 block->bbNext == compiler->fgFirstColdBlock)
 {
instGen(INS_BREAKPOINT); // This should never get executed
 }
// Do likewise for blocks that end in DOES_NOT_RETURN calls
// that were not caught by the above rules. This ensures that
// gc register liveness doesn't change across call instructions
// in fully-interruptible mode.
else
 {
 GenTree* call = block->lastNode();

if ((call != nullptr) && (call->gtOper == GT_CALL))
 {
if ((call->AsCall()->gtCallMoreFlags & GTF_CALL_M_DOES_NOT_RETURN) != 0)
 {
instGen(INS_BREAKPOINT); // This should never get executed
 }
 }
 }

break;

case BBJ_CALLFINALLY:
 block = genCallFinally(block);
break;

#if defined(FEATURE_EH_FUNCLETS)

case BBJ_EHCATCHRET:
genEHCatchRet(block);
 __fallthrough;

case BBJ_EHFINALLYRET:
case BBJ_EHFILTERRET:
genReserveFuncletEpilog(block);
break;

#else// !FEATURE_EH_FUNCLETS

case BBJ_EHCATCHRET:
noway_assert(!"Unexpected BBJ_EHCATCHRET"); // not used on x86

case BBJ_EHFINALLYRET:
case BBJ_EHFILTERRET:
genEHFinallyOrFilterRet(block);
break;

#endif// !FEATURE_EH_FUNCLETS

case BBJ_NONE:
case BBJ_COND:
case BBJ_SWITCH:
break;

default:
noway_assert(!"Unexpected bbJumpKind");
break;
 }

#if defined(DEBUG) && defined(USING_VARIABLE_LIVE_RANGE)
if (compiler->verbose)
 {
 varLiveKeeper->dumpBlockVariableLiveRanges(block);
 }
#endif// defined(DEBUG) && defined(USING_VARIABLE_LIVE_RANGE)

INDEBUG(compiler->compCurBB = nullptr);

 } //------------------ END-FOR each block of the method -------------------

// There could be variables alive at this point. For example see lvaKeepAliveAndReportThis.
// This call is for cleaning the GC refs
genUpdateLife(VarSetOps::MakeEmpty(compiler));

/* Finalize the spill tracking logic */

 regSet.rsSpillEnd();

/* Finalize the temp tracking logic */

 regSet.tmpEnd();

#ifdef DEBUG
if (compiler->verbose)
 {
printf("\n# ");
printf("compCycleEstimate = %6d, compSizeEstimate = %5d ", compiler->compCycleEstimate,
 compiler->compSizeEstimate);
printf("%s\n", compiler->info.compFullName);
 }
#endif
}

/*
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
XX XX
XX Register Management XX
XX XX
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
*/

//------------------------------------------------------------------------
// genSpillVar: Spill a local variable
//
// Arguments:
// tree - the lclVar node for the variable being spilled
//
// Return Value:
// None.
//
// Assumptions:
// The lclVar must be a register candidate (lvRegCandidate)

voidCodeGen::genSpillVar(GenTree* tree)
{
unsigned varNum = tree->AsLclVarCommon()->GetLclNum();
 LclVarDsc* varDsc = &(compiler->lvaTable[varNum]);

assert(varDsc->lvIsRegCandidate());

// We don't actually need to spill if it is already living in memory
bool needsSpill = ((tree->gtFlags & GTF_VAR_DEF) == 0 && varDsc->lvIsInReg());
if (needsSpill)
 {
// In order for a lclVar to have been allocated to a register, it must not have been aliasable, and can
// therefore be store-normalized (rather than load-normalized). In fact, not performing store normalization
// can lead to problems on architectures where a lclVar may be allocated to a register that is not
// addressable at the granularity of the lclVar's defined type (e.g. x86).
 var_types lclTyp = genActualType(varDsc->TypeGet());
 emitAttr size = emitTypeSize(lclTyp);

 instruction storeIns = ins_Store(lclTyp, compiler->isSIMDTypeLocalAligned(varNum));
assert(varDsc->GetRegNum() == tree->GetRegNum());
inst_TT_RV(storeIns, tree, tree->GetRegNum(), 0, size);

genUpdateRegLife(varDsc, /*isBorn*/false, /*isDying*/trueDEBUGARG(tree));
 gcInfo.gcMarkRegSetNpt(varDsc->lvRegMask());

if (VarSetOps::IsMember(compiler, gcInfo.gcTrkStkPtrLcls, varDsc->lvVarIndex))
 {
#ifdef DEBUG
if (!VarSetOps::IsMember(compiler, gcInfo.gcVarPtrSetCur, varDsc->lvVarIndex))
 {
JITDUMP("\t\t\t\t\t\t\tVar V%02u becoming live\n", varNum);
 }
else
 {
JITDUMP("\t\t\t\t\t\t\tVar V%02u continuing live\n", varNum);
 }
#endif
VarSetOps::AddElemD(compiler, gcInfo.gcVarPtrSetCur, varDsc->lvVarIndex);
 }
 }

 tree->gtFlags &= ~GTF_SPILL;
 varDsc->SetRegNum(REG_STK);
if (varTypeIsMultiReg(tree))
 {
 varDsc->SetOtherReg(REG_STK);
 }

#ifdef USING_VARIABLE_LIVE_RANGE
if (needsSpill)
 {
// We need this after "lvRegNum" has change because now we are sure that varDsc->lvIsInReg() is false.
// "SiVarLoc" constructor uses the "LclVarDsc" of the variable.
 varLiveKeeper->siUpdateVariableLiveRange(varDsc, varNum);
 }
#endif// USING_VARIABLE_LIVE_RANGE
}

//------------------------------------------------------------------------
// genUpdateVarReg: Update the current register location for a lclVar
//
// Arguments:
// varDsc - the LclVarDsc for the lclVar
// tree - the lclVar node
//
// inline
voidCodeGenInterface::genUpdateVarReg(LclVarDsc* varDsc, GenTree* tree)
{
assert(tree->OperIsScalarLocal() || (tree->gtOper == GT_COPY));
 varDsc->SetRegNum(tree->GetRegNum());
}

//------------------------------------------------------------------------
// sameRegAsDst: Return the child that has the same reg as the dst (if any)
//
// Arguments:
// tree - the node of interest
// other - an out parameter to return the other child
//
// Notes:
// If 'tree' has a child with the same assigned register as its target reg,
// that child will be returned, and 'other' will contain the non-matching child.
// Otherwise, both other and the return value will be nullptr.
//
GenTree* sameRegAsDst(GenTree* tree, GenTree*& other /*out*/)
{
if (tree->GetRegNum() == REG_NA)
 {
 other = nullptr;
returnnullptr;
 }

 GenTree* op1 = tree->AsOp()->gtOp1;
 GenTree* op2 = tree->AsOp()->gtOp2;
if (op1->GetRegNum() == tree->GetRegNum())
 {
 other = op2;
return op1;
 }
if (op2->GetRegNum() == tree->GetRegNum())
 {
 other = op1;
return op2;
 }
else
 {
 other = nullptr;
returnnullptr;
 }
}

//------------------------------------------------------------------------
// genUnspillRegIfNeeded: Reload the value into a register, if needed
//
// Arguments:
// tree - the node of interest.
//
// Notes:
// In the normal case, the value will be reloaded into the register it
// was originally computed into. However, if that register is not available,
// the register allocator will have allocated a different register, and
// inserted a GT_RELOAD to indicate the register into which it should be
// reloaded.
//
voidCodeGen::genUnspillRegIfNeeded(GenTree* tree)
{
 regNumber dstReg = tree->GetRegNum();
 GenTree* unspillTree = tree;

if (tree->gtOper == GT_RELOAD)
 {
 unspillTree = tree->AsOp()->gtOp1;
 }

if ((unspillTree->gtFlags & GTF_SPILLED) != 0)
 {
if (genIsRegCandidateLocal(unspillTree))
 {
// Reset spilled flag, since we are going to load a local variable from its home location.
 unspillTree->gtFlags &= ~GTF_SPILLED;

 GenTreeLclVarCommon* lcl = unspillTree->AsLclVarCommon();
 LclVarDsc* varDsc = &compiler->lvaTable[lcl->GetLclNum()];

// TODO-Cleanup: The following code could probably be further merged and cleaned up.
#ifdef _TARGET_XARCH_
// Load local variable from its home location.
// In most cases the tree type will indicate the correct type to use for the load.
// However, if it is NOT a normalizeOnLoad lclVar (i.e. NOT a small int that always gets
// widened when loaded into a register), and its size is not the same as genActualType of
// the type of the lclVar, then we need to change the type of the tree node when loading.
// This situation happens due to "optimizations" that avoid a cast and
// simply retype the node when using long type lclVar as an int.
// While loading the int in that case would work for this use of the lclVar, if it is
// later used as a long, we will have incorrectly truncated the long.
// In the normalizeOnLoad case ins_Load will return an appropriate sign- or zero-
// extending load.

 var_types treeType = unspillTree->TypeGet();
if (treeType != genActualType(varDsc->lvType) && !varTypeIsGC(treeType) && !varDsc->lvNormalizeOnLoad())
 {
assert(!varTypeIsGC(varDsc));
 var_types spillType = genActualType(varDsc->lvType);
 unspillTree->gtType = spillType;
inst_RV_TT(ins_Load(spillType, compiler->isSIMDTypeLocalAligned(lcl->GetLclNum())), dstReg,
 unspillTree);
 unspillTree->gtType = treeType;
 }
else
 {
inst_RV_TT(ins_Load(treeType, compiler->isSIMDTypeLocalAligned(lcl->GetLclNum())), dstReg, unspillTree);
 }
#elif defined(_TARGET_ARM64_)
 var_types targetType = unspillTree->gtType;
if (targetType != genActualType(varDsc->lvType) && !varTypeIsGC(targetType) && !varDsc->lvNormalizeOnLoad())
 {
assert(!varTypeIsGC(varDsc));
 targetType = genActualType(varDsc->lvType);
 }
 instruction ins = ins_Load(targetType, compiler->isSIMDTypeLocalAligned(lcl->GetLclNum()));
 emitAttr attr = emitActualTypeSize(targetType);
 emitter* emit = GetEmitter();

// Load local variable from its home location.
inst_RV_TT(ins, dstReg, unspillTree, 0, attr);
#elif defined(_TARGET_ARM_)
 var_types targetType = unspillTree->gtType;
 instruction ins = ins_Load(targetType, compiler->isSIMDTypeLocalAligned(lcl->GetLclNum()));
 emitAttr attr = emitTypeSize(targetType);

// Load local variable from its home location.
inst_RV_TT(ins, dstReg, unspillTree, 0, attr);
#else