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esp32-hal-spi.h
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// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndefMAIN_ESP32_HAL_SPI_H_
#defineMAIN_ESP32_HAL_SPI_H_
#include"soc/soc_caps.h"
#ifSOC_GPSPI_SUPPORTED
#ifdef__cplusplus
extern"C" {
#endif
#include"sdkconfig.h"
#include<stdint.h>
#include<stdbool.h>
#defineSPI_HAS_TRANSACTION
#ifdefCONFIG_IDF_TARGET_ESP32S2
#defineFSPI 1 //SPI 1 bus. ESP32S2: for external memory only (can use the same data lines but different SS)
#defineHSPI 2 //SPI 2 bus. ESP32S2: external memory or device - it can be matrixed to any pins
#defineSPI2 2 // Another name for ESP32S2 SPI 2
#defineSPI3 3 //SPI 3 bus. ESP32S2: device only - it can be matrixed to any pins
#elifCONFIG_IDF_TARGET_ESP32
#defineFSPI 1 //SPI 1 bus attached to the flash (can use the same data lines but different SS)
#defineHSPI 2 //SPI 2 bus normally mapped to pins 12 - 15, but can be matrixed to any pins
#defineVSPI 3 //SPI 3 bus normally attached to pins 5, 18, 19 and 23, but can be matrixed to any pins
#else
#defineFSPI 0
#defineHSPI 1
#endif
// This defines are not representing the real Divider of the ESP32
// the Defines match to an AVR Arduino on 16MHz for better compatibility
#defineSPI_CLOCK_DIV2 0x00101001 //8 MHz
#defineSPI_CLOCK_DIV4 0x00241001 //4 MHz
#defineSPI_CLOCK_DIV8 0x004c1001 //2 MHz
#defineSPI_CLOCK_DIV16 0x009c1001 //1 MHz
#defineSPI_CLOCK_DIV32 0x013c1001 //500 KHz
#defineSPI_CLOCK_DIV64 0x027c1001 //250 KHz
#defineSPI_CLOCK_DIV128 0x04fc1001 //125 KHz
#defineSPI_MODE0 0
#defineSPI_MODE1 1
#defineSPI_MODE2 2
#defineSPI_MODE3 3
#defineSPI_SS0 0
#defineSPI_SS1 1
#defineSPI_SS2 2
#defineSPI_SS_MASK_ALL 0x7
#defineSPI_LSBFIRST 0
#defineSPI_MSBFIRST 1
structspi_struct_t;
typedefstructspi_struct_tspi_t;
spi_t*spiStartBus(uint8_tspi_num, uint32_tclockDiv, uint8_tdataMode, uint8_tbitOrder);
voidspiStopBus(spi_t*spi);
//Attach/Detach Signal Pins
boolspiAttachSCK(spi_t*spi, int8_tsck);
boolspiAttachMISO(spi_t*spi, int8_tmiso);
boolspiAttachMOSI(spi_t*spi, int8_tmosi);
boolspiDetachSCK(spi_t*spi);
boolspiDetachMISO(spi_t*spi);
boolspiDetachMOSI(spi_t*spi);
//Attach/Detach SS pin to SPI_SSx signal
boolspiAttachSS(spi_t*spi, uint8_tss_num, int8_tss);
boolspiDetachSS(spi_t*spi);
//Enable/Disable SPI_SSx pins
voidspiEnableSSPins(spi_t*spi, uint8_tss_mask);
voidspiDisableSSPins(spi_t*spi, uint8_tss_mask);
//Enable/Disable hardware control of SPI_SSx pins
voidspiSSEnable(spi_t*spi);
voidspiSSDisable(spi_t*spi);
//Activate enabled SPI_SSx pins
voidspiSSSet(spi_t*spi);
//Deactivate enabled SPI_SSx pins
voidspiSSClear(spi_t*spi);
voidspiWaitReady(spi_t*spi);
uint32_tspiGetClockDiv(spi_t*spi);
uint8_tspiGetDataMode(spi_t*spi);
uint8_tspiGetBitOrder(spi_t*spi);
/*
* Non transaction based lock methods (each locks and unlocks when called)
* */
voidspiSetClockDiv(spi_t*spi, uint32_tclockDiv);
voidspiSetDataMode(spi_t*spi, uint8_tdataMode);
voidspiSetBitOrder(spi_t*spi, uint8_tbitOrder);
voidspiWrite(spi_t*spi, constuint32_t*data, uint8_tlen);
voidspiWriteByte(spi_t*spi, uint8_tdata);
voidspiWriteWord(spi_t*spi, uint16_tdata);
voidspiWriteLong(spi_t*spi, uint32_tdata);
voidspiTransfer(spi_t*spi, uint32_t*out, uint8_tlen);
uint8_tspiTransferByte(spi_t*spi, uint8_tdata);
uint16_tspiTransferWord(spi_t*spi, uint16_tdata);
uint32_tspiTransferLong(spi_t*spi, uint32_tdata);
voidspiTransferBytes(spi_t*spi, constuint8_t*data, uint8_t*out, uint32_tsize);
voidspiTransferBits(spi_t*spi, uint32_tdata, uint32_t*out, uint8_tbits);
/*
* New (EXPERIMENTAL) Transaction lock based API (lock once until endTransaction)
* */
voidspiTransaction(spi_t*spi, uint32_tclockDiv, uint8_tdataMode, uint8_tbitOrder);
voidspiSimpleTransaction(spi_t*spi);
voidspiEndTransaction(spi_t*spi);
voidspiWriteNL(spi_t*spi, constvoid*data_in, uint32_tlen);
voidspiWriteByteNL(spi_t*spi, uint8_tdata);
voidspiWriteShortNL(spi_t*spi, uint16_tdata);
voidspiWriteLongNL(spi_t*spi, uint32_tdata);
voidspiWritePixelsNL(spi_t*spi, constvoid*data_in, uint32_tlen);
#definespiTransferNL(spi, data, len) spiTransferBytesNL(spi, data, data, len)
uint8_tspiTransferByteNL(spi_t*spi, uint8_tdata);
uint16_tspiTransferShortNL(spi_t*spi, uint16_tdata);
uint32_tspiTransferLongNL(spi_t*spi, uint32_tdata);
voidspiTransferBytesNL(spi_t*spi, constvoid*data_in, uint8_t*data_out, uint32_tlen);
voidspiTransferBitsNL(spi_t*spi, uint32_tdata_in, uint32_t*data_out, uint8_tbits);
/*
* Helper functions to translate frequency to clock divider and back
* */
uint32_tspiFrequencyToClockDiv(uint32_tfreq);
uint32_tspiClockDivToFrequency(uint32_tfreq);
#ifdef__cplusplus
}
#endif
#endif/* SOC_GPSPI_SUPPORTED */
#endif/* MAIN_ESP32_HAL_SPI_H_ */